Jvc-KDS-620-Service-Manual(1) 电路图 维修手册.pdf

SERVICE MANUAL CD RECEIVER No.49581 Dec. 2000 COPYRIGHT 2000 VICTOR COMPANY OF JAPAN, LTD. KD-S570 / KD-S620 KD-S570 / KD-S620 Area Suffix J - Northern America Contents Safety precaution Location of main parts Disassembly method Adjustment method Flow of functional operation until TOC read Maintenance of laser pickup Description of major ICs 1-2 1-3 1-4 1-9 1-10 1-12 1-13 This service manual is printed on 100% recycled paper. COMPACT DIGITAL AUDIO KD-S620KD-S620 KD-S620 KD-S570KD-S570 KD-S570 31 Model KD-S620 KD-S570 Remote control unit RadioFans.CN 收音机爱 好者资料库 KD-S570/KD-S620 1-2 ! Burrs formed during molding may be left over on some parts of the chassis. Therefore, pay attention to such burrs in the case of preforming repair of this system. Safety precaution ! Please use enough caution not to see the beam directly or touch it in case of an adjustment or operation check. RadioFans.CN 收音机爱 好者资料库 KD-S570/KD-S620 1-3 Main unit Location of main parts Control unit CD mechanism DisplayLED Digital: 0) RF signal Flow of functional operation until TOC read When the pickup correctly moves to the inner area of the disc TERMINAL Microprocessor commands FMO TC9462 53 FEED MOTOR +TERMINAL IC581 5 REST SW When the disc correctly rotates Tracking Servo Loop ON Servo CLV Rough Servo AccelerationAccelerationAcceleration Microprocessor commands Spindle motor (-) IC581 7 0.5 Sec 0.5 Sec KD-S570/KD-S620 1-11 Feed Section Focus Section Tracking Section Spindle Section Is the voltage output at IC521 pin 53 5V or 0V? Check the feed motor. Is 4V present at both sides of the feed motor? Is the wiring for IC521 (90) (100) correct? Check IC581. Is 6V or 2V present at IC581 5 and 6? Is 5V present at IC581 pin 11? Check the feed motor connection wiring. Check the vicinity of IC521. Check CD 9V and 5V. YES YES YES NONO NO NO NO YES YES When the lens is moving: Check the circuits in the vicinity of IC581 pins 15 18. Check the pickup and its connections. NO YES YES YES Does the S-search waveform appear at IC581 pins 17 and 18? Is the disk rotated? Does the RF signal appear at TP1? Is 4V present at IC581 pins 7 and 8 ? Check the spindle motor and its wiring. Is 4V present at IC521 pin 55 ? Check the vicinity of IC581. Check IC501 and IC521. YES NO NO NO NONO YES YES YES Check the circuits in the vicinity of IC501 19 24 or the pickup Is the RF waveform at TP1 distorted? Proceed to the Tracking section When the disc is rotated at first: Check the circuit in the vicinity of IC501 pins 2 12. Check IC521. Check the pickup and its connections. YESYES YES Is the tracking error signal output at IC501 12? Approx. 1.2 V 4V KD-S570/KD-S620 1-12 Maintenance of laser pickup (1) Cleaning the pick up lens Before you replace the pick up, please try to clean the lens with a alcohol soaked cotton swab. (2) Life of the laser diode When the life of the laser diode has expired, the following symptoms will appear. (1) The level of RF output (EFM output:ampli tude of eye pattern) will be low. Replacement of laser pickup Is RF output 1.0 0.35Vp-p? Replace it. NO YES O.K (3) Semi-fixed resistor on the APC PC board The semi-fixed resistor on the APC printed circuit board which is attached to the pickup is used to adjust the laser power.Since this adjustment should be performed to match the characteristics of the whole optical block, do not touch the semi-fixed resistor. If the laser power is lower than the specified value,the laser diode is almost worn out, and the laser pickup should be replaced. If the semi-fixed resistor is adjusted while the pickup is functioning normally,the laser pickup may be damaged due to excessive current. Turn off the power switch and,disconnect the power cord from the ac outlet. Replace the pickup with a normal one.(Refer to Pickup Removal on the previous page) Plug the power cord in,and turn the power on. At this time,check that the laser emits for about 3seconds and the objective lens moves up and down. Note: Do not observe the laser beam directly. Play a disc. Check the eye-pattern at TP1. Finish. KD-S570/KD-S620 1-13 3.Pin Functions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 SDA GND OUTLR OUTLF TL B2L B1L IVL ILL QSL IDL MUTE ICL IMD IBL IAL SCL VCC OUTRR OUTRF TR B2R B1R IVR ILR QSR IDR Vref ICR CAP IBR IAR CD-CH TAPE TUNER POWER SUPPLY SOURCE SELECTOR VOLUME 1 +20 to -31 dB LOUDNESS LEFT BASS LEFT +15 dB TREBLE LEFT +12 dB BASS RIGHT +15 dB TREBLE RIGHT +12 dB MUTE FUNCTION ZERO CROSS DETECTOR VOLUME 2 0 to 55 dB BALANCE FENDER REAR VOLUME 2 0 to 55 dB BALANCE FENDER FRONT HC BUS REC VOLUME 2 0 to -55dB BALANCE FENDER FRONT VOLUME 2 0 to -55dB BALANCE FENDER REAR VOLUME 1 +20 to -31 dB LOUDNESS RIGHT LOGIC 21 31 2 19 16 15 13 11 22 20 18 17 14 23252426 2728 30 29 1 32 3 4 108976512 1.Terminal Layout 2.Block Diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin No. Pin No. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 SDA GND OUTLR OUTLF TL B2L B1L IVL ILL QSL IDL MUTE ICL IMO IBL IAL Serial data input/output. Ground. output left rear. output left front. Treble control capacitor left channel or input from an external equalizer. Bass control capacitor leftchannel or output to an external equalizer. Bass control capacitor left channel. Input volume 1. left control part. Input loudness. left control part. Output source selector. left channel. Not used Not used Input C left source. Not used Input B left source. Input A left source. I/O - O O I - - I I O - - I - I I Symbol I/O Symbol I/O Input A right source. Input B right source. Electronic filtering for supply. Input C right source. Reference voltage (0.5Vcc) Not used Output source selector right channel. Input loudness right channel. Input volume 1. right control part. Bass control capacitor right channel Bass control capacitor right channel or output to an external equalizer. Treble control capacitor right channel or input from an external equalizer. Output right front. Output right rear. Supply voltage. Serial clock input. I I - I - - O I I - O I O O - I IAR IBR CAP ICR Vref IDR QSR ILR IVR B1R B2R TR OUTRF OUTRR Vcc SCL FunctionsFunctions TEA6320T-X(IC301) : E.volume Description of major ICs KD-S570/KD-S620 1-14 AN8806SB-W (IC501) : RF&Servo amp. PD LD LDON LDP VCC RF- RF OUT RF IN C.AGC ARF C.ENV C.EA CS BDO BDO CS BRT OFTR /NRFDET GND PDAC PDBD PDF PDE PDER PDFR TBAL FBAL EF- EF OUT TE- TE OUT CROSS TE BPF VDET LD OFF VREF ENV 302425262322143 33 32 34 31 36 35 13 14 15 16 20 2 21 629728 27891017111219 ENV CURCUITRF DET AGC EQ BDO OFTR - + - + - + - +- + - + - + - + - + - + - + - + - + - + -+ - + - + - + VCBA VCBA VCBA VCBA - + 1.Pin layout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 2.Block diagram KD-S570/KD-S620 1-15 35 36 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 3. Pin function PD AC FBAL TBAL PDFR PDER PDF PDE PD BD TE BPF VDET CROSS TE OUT TE- FE OUT FE- /NRFDET GND LD OFF VREF ENV OFTR C.AGC ARF C.ENV C.EA CS BDO BDO CS BRT LD LD ON LDP VCC RF- RF OUT RF IN PD Pin No.Symbol I/O I O I - - I O I I/O O I/O I/O I/O O I/O O O - O O - O I O O I O I I I I/O I/O I I I II-V amp input I-V amp input I-V amp input I-V amp input E I-V amp gain control F I-V amp gain control Tracking balance control Focus balance control Inverse input pin for focus error amp Output pin of focus error Inverse input pin for tracking error amp Tracking error signal output Tracking error cross output Input pin of tracking error through BPF Vibration detection signal output Connect to ground Reference voltage output Description APC amp input terminal APC amp output terminal APC ON/OFF control terminal Envelope output Ground RF detection signal output Of-track status signal output BDO output pin A capacitor is connected to this terminal to detect the envelope of RF signal RF output Connecting pin of AGC loop filter RF input RFamp output Inverse input pin for RF amp Power supply Connect to ground A capacitor is connected to this terminal to detect the envelope of RF signal A capacitor is connected to detect the lower envelope of RF signal A capacitor is connected to detect the lower envelope of RF signal AN8806SB-W KD-S570/KD-S620 1-16 1. Terminal Layout 20 1 41 60 21 40 80 61 2. Block Diagram O F T / R F D E B D O V D E T T R C R S R F E N V T E F E INPUTSERVO TIMING GENERATOR A/D CONVERTER / T E S T / R S T D V S S 1 D V D D 1 V S S V D D CLV SERVO MICRO COMPUTER INTERFACE VCO ITUNING GENERATION PITCH CONTROL STAT CK384(EFM) VCOF BYTCK SMCK FCLK CSEL MSEL X2 X1 PCK EFM PLLF DSLF IREF DRF ARF RSEL PSEL MLD MCLK MDATA DSL. PLL VCO AVDD2 SUB CODE BUFFER SSEL SQCK SUBQ AVDD2 CLVS CRC BLKCK CLDCK SBCK SUBC DEMPH RESY FLAG6(RESY) EFM DEMODULATION SUBCODE DEMODULATION SYNC INTERPOLATION 16k SRAM CIRC ERROR CORRECTION DEINTERLEVE LRCKIN(MSEL) BCLK(SSEL) SRDATAIN (PSEL) IOSEL DIGITAL DEEMPHSIS 8TIMES OVER SAMPUNC DIGITAL FILTER1BIT DAC LOGIC S PEM (R) PEM (L) DIGITAL AUDIO INTERFACE DIGITAL AUDIO INTERFACE INTER POLATION SOFT MUTING DIGITAL ATTENUATION PEAK DETECTIVE AUTO CUE D/A CONVERTER OUTPUTPORT AVSS1 AVDD1 OUTR OUTL FLAG IPFLAG TX ECM PC LRCK SRDATA BCLK DMUTE TRKV KICK VREF TRVSTR ECS TVD TRD FOD TBAL FBAL TOFS TES /TLOCK /FLOCK PLAY LDON WVEL SENSE MN35510(IC561):Digital servo & digital signal processor KD-S570/KD-S620 1-17 3. Description Pin No. symbolI/O O O O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Pin No. symbolI/O 42 41 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 O II II O BCLK LRCK SRDATA DVDD1 DVSS1 TX MCLK MDATA MLD I I I SENSE FLOCK TLOCK BLKCK SQCK O O O O O O I III I SUBQ DMUTE STATUS I O O RST SMCK PMCK TRV TVD PC ECM ECS KICK TRD O O O O O O O I I I FOD VREF FBAL TBAL FE TE I I I I IRF ENV VDET OFT TRCRS I O RFDET BDO LDON Description Not used Not used Not used Connected to GND Digital audio interface output Power supply (Digital) Micom command clock signal input Micom command load signal input Micom command data input Focus lock signal output Active :Low Sence signal output (Data is latched at signals rising point) Tracking lock signal output Active :Low sub-code - block - clock signal output Outside clock for sub-code Q resister input Sub-code Q -code output Connected to GND Status signal (CRC,CUE,CLVS,TTSTOP,ECLV,SQOK) Reset signal input (L:Reset) Not used Not used Traverse enforced output Traverse drive output Not used Spindle motor drive signal (Enforced mode output) 3-State Spindle motor drive signal (Servo error signal output) Kick pulse output Tracking drive output Focus drive output Reference voltage input pin for D/A output block (TVD,FOD,FBA,TBAL) Focus Balance adjust signal output Tracking Balance adjust signal output Focus error signal input(Analog input) Tracking error signal input(Analog input) RF envelope signal input(Analog input) Vibration detect signal input(H:detect) Off track signal input(H:off track) Track cross signal input RF detect signal input(L:detect) BDO input pin(L:detect) Laser ON signal output(H:on) I I I I/O I/O IIIIII Description Not used Not used TES PLAY WVEL ARF IREF DRF DSLF PLLF Tracking error shunt signal output(H:shunt) RF signal input Reference current input pin Bias pin for DSL Not used Loop filter pin for DSL Loop filter pin for PLL Power supply(Analog) Connected to GND(Analog) Not used Not used Not used Not used Not used IIII Connected to GND(for Xtal oscillation circuit) I O I O O IIIIIIIIIIIIIIII Not used Not used Not used Not used Not used Not used Not used Not used Not used Pull up Connected to GND Connected to GND Connected to GND pull up pull up pull up Power supply(Digital) Lch audio output Connected to GND Rch audio output Power supply(for Xtal oscillation circuit) Input of 16.9344MHz Xtal oscillation circuit Output of Xtal oscillation circuit VCOF AVDD2 AVSS2 EFM PCK PDO SUBC SBCK VSS XI X2 VDD BYTCK CLDCK FLAG IPPLAG FLAG CLVS CRC DEMPH RESY IOSEL TEST AVDD1 OUT L AVSS1 OUT R RSEL SSEL MSEL PSEL CSEL MN35510 KD-S570/KD-S620 1-18 LA6557-X(IC541) : Servo BTL driver 1 2 3 4 5 6 78 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 - + - + - + - + - + - + - + FR FR Signal system power CH1,2 POWER POWER Output control MUTE is as follows High : output ON Low : output OFF Input 11k 11k 11k 11k 22k 22k 22k 22k Mute Level shift Level shift Level shift Level shift CH3,4,5 CH5CH4 CH3 CH2CH1 VCC2 V05- V05+ V04+ V04- V03+ V03- FR V02+ V02- V01+ V01- VCC1 VIN1 VIN1G REW FWD S-GND MUTE VIN4 VING4 VCC-S FR VREF-IN REG-OUT REG-IN VIN3G VIN3 VIN2G VIN2 Thermal shutdown 1. Block diagram 2.Pin function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 VCC2 V05- V05+ V04+ V04- V03+ V03- V02+ V02- V01+ V01- VCC1 VIN1 VIN1G VIN2 VIN2G VIN3 VIN3G REG-IN REG-OUT VRFE-IN VCC-S VIN4G VIN4 MUTE S-GND FWD REV Power for channels 3,4, and 5 (VCC1 and VCC-S short-circuited) Loading output (-) Loading output (+) Output pin (+) for channel 4 Output pin (-) for channel 4 Output pin (+) for channel 3 Output pin (-) for channel 3 Output pin (+) for channel 2 Output pin (-) for channel 2 Output pin (+) for channel 1 Output pin (-) for channel 1 Power for channels 1 and 2 (BTL), (VCC-S and VCC2 short-circuited) Input pin for channel 1 Input pin for channel 1 (for gain control) Input pin for channel 2 Input pin for channel 2 (for gain control) Input pin for channel 3 Input pin for channel 3 (for gain control) Regulator pin (External PNP base) Regulator pin (External PNP collector) Reference voltage input pin Signal system power (VCC1 and VCC2 short-circuited) Input pin for channel 4 (for gain control) Input pin for channel 4 Output ON/OFF, channels 1 to 4 (BTL AMP) Signal system GND 5CH(VL0) Output change pin (FWD), Logic input for loading block 5CH(VL0) Output change pin (REW), Logic input for loading block Pin No. Pin Name Description KD-S570/KD-S620 1-19 LC72366-9989 (IC801) : Main micon 1. Pin layout 2. Pin function 1 24 64 41 80 65 25 40 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 XIN TEST2 J BUS SI J BUS SO J BUS SCK J BUS I/O CONT SUBQ SQCK RESET LCD SI LCD SO LCDSCK LCD CE FM ILLUMI AM ILLUMI CD ILLUMI DIMMER OUT LM0 LM1 KS2 KS1 KS0 DETACH K2 K1 K0 Vdd SW2 CD LSI RESET MCLK MDATA MLD SCL SDA 4.5MHz crysral oscillation Connect to ground J-BUS signal data input ( to 74HC126 ) J-BUS signal data output ( to 74HC126 ) J-BUS output clock signa