Denon-AVC1909-avr-sm维修电路图 手册.pdf

Denon Brand Company, D Edge detection is “Ed”; Detection by both shifting is “E Serial data detection is “S” (Serial data output is also “S”). Res: State at reset. “H”= Outputs High Level at reset “L”= Outputs Low Level at reset “Z”= Becomes High impedance mode at reset STBY: State of port when STANDBY mode. “O/L” = Output port and “L” “I”= Input port Stop: State of port when Stop mode. “O/L”= Output port and “L” “I”= Input port RadioFans.CN 42 AVR-1909/789, AVC-1909 M3062LFGPGP (IC1405) M3062LFGPGP Terminal Function PinPin NameSymbolI/OTypeDet Op (Int.) Op (Ext.) ResFunction 1P94/TB4VPLD DATAOC-ZVIDEO PLD control pin 2P93/TB3DIR CEOC-ZDIR control pin(LC89057W-VF4A) 3P92/SOUT3DIR DINOC-ZDIR control pin(LC89057W-VF4A) 4P91/SIN3DIR DOUTI-Lv-EuZDIR control pin(LC89057W-VF4A) 5P90/CLK3DIR CLKOC-ZDIR control pin(LC89057W-VF4A) 6BYTEBYTE-GND(Ext. data bus bit width switching, 16bit:L) 7CNVCSCNVSS-Single-chip/Micro-processor mode switching(Normal single-chip:L, Rewrite boot program start:H input set) 8P87VERSTOC-EuZReset for VIDEO ENCODER(ADV7172) 9P86VDRSTOC-EuZReset for VIDEO DECODER(ADV7401) 10RESETSUBRESETI-Lv-EuLReset input 11XOUTX1O-Oscillator connection 12VSSVSS-GND 13XINX2I-Oscillator connection 14VCCVCC-+3.3V 15P85/NMINMII-Not used(Fixed to H) 16P84/INT2CEC_INI- E Edge detection is “Ed”; Detection by both shifting is “E Serial data detection is “S” (Serial data output is also “S”). Res: State at reset. “H”= Outputs High Level at reset “L”= Outputs Low Level at reset “Z”= Becomes High impedance mode at reset STBY: State of port when STANDBY mode. “O/L” = Output port and “L” “I”= Input port Stop: State of port when Stop mode. “O/L”= Output port and “L” “I”= Input port RadioFans.CN 45 AVR-1909/789, AVC-1909 FLI2310 (IC1011) FLI2310 Block Diagram 1 5 5 1 5 0 1 4 5 1 4 0 1 3 5 1 3 0 1 2 5 1 2 0 1 1 5 1 1 0 1 0 5 1 5 1 0 1 5 2 0 2 5 3 0 3 5 4 0 4 5 5 0 5 5 6 5 6 0 1 0 0 9 5 9 0 8 5 8 0 7 5 7 0 2 0 5 1 9 5 2 0 0 1 6 0 1 6 5 1 7 0 1 7 5 1 8 0 1 8 5 1 9 0 HSYNC1_PORT1 VDD1 B/Cb/D1_0 VSS IN_CLK1_PORT1 FIELD ID1_PORT1 VSYNC1_PORT1 HSYNC2_PORT1 IN_CLK2_PORT1 FIELD ID2_PORT1 VSYNC2_PORT1 B/Cb/D1_6 B/Cb/D1_5 B/Cb/D1_4 B/Cb/D1_3 B/Cb/D1_2 B/Cb/D1_1 B/Cb/D1_7 VDDcore1 VSScore R/Cr/Cb Cr_0 R/Cr/Cb Cr_6 R/Cr/Cb Cr_5 R/Cr/Cb Cr_4 R/Cr/Cb Cr_3 R/Cr/Cb Cr_2 R/Cr/Cb Cr_1 R/Cr/Cb Cr_7 VDD2 VSS G/Y/Y_0 G/Y/Y_1 G/Y/Y_6 G/Y/Y_5 G/Y/Y_4 G/Y/Y_3 G/Y/Y_2 G/Y/Y_7 VDDcore2 VSScore IN_SEL TEST DEV_ADDR1 DEV_ADDR0 SCLK SDATA RESET_N VDD3 VSS SDRAM DATA(0) SDRAM DATA(2) SDRAM DATA(1) SDRAM DATA(3) SDRAM DATA(10) SDRAM DATA(9) SDRAM DATA(8) SDRAM DATA(7) SDRAM DATA(6) SDRAM DATA(5) SDRAM DATA(4) SDRAM DATA(17) SDRAM DATA(16) SDRAM DATA(15) SDRAM DATA(14) SDRAM DATA(12) SDRAM DATA(13) SDRAM DATA(11) VDD4 VSS VDDcore3 VSScore SDRAM DATA(20) SDRAM DATA(19) SDRAM DATA(18) SDRAM DATA(31) SDRAM DATA(30) SDRAM DATA(29) SDRAM DATA(28) SDRAM DATA(26) SDRAM DATA(27) SDRAM DATA(25) SDRAM DATA(24) SDRAM DATA(23) SDRAM DATA(21) SDRAM DATA(22) VDDcore4 VSScore VSS VDD5 TEST IN SDRAM ADDR(10) SDRAM ADDR(5) SDRAM ADDR(4) SDRAM ADDR(3) SDRAM ADDR(6) SDRAM ADDR(7) SDRAM ADDR(8) SDRAM ADDR(9) VDDcore5 VSScore SDRAM ADDR(0) SDRAM ADDR(1) SDRAM ADDR(2) SDRAM WEN B/U/Pb_OUT_7 VDDcore7 VSScore R/V/Pr_OUT_7 VDD8 VSS G/Y/Y_OUT_7 G/Y/Y_OUT_1 G/Y/Y_OUT_2 G/Y/Y_OUT_3 G/Y/Y_OUT_4 G/Y/Y_OUT_5 G/Y/Y_OUT_6 G/Y/Y_OUT_0 R/V/Pr_OUT_0 R/V/Pr_OUT_1 R/V/Pr_OUT_2 R/V/Pr_OUT_3 R/V/Pr_OUT_4 R/V/Pr_OUT_5 R/V/Pr_OUT_6 B/U/Pb_OUT_0 B/U/Pb_OUT_1 B/U/Pb_OUT_2 B/U/Pb_OUT_3 B/U/Pb_OUT_4 B/U/Pb_OUT_5 B/U/Pb_OUT_6 VSS VDD7 CLKOUT VSScore VDDcore6 TEST OUT1 CTLOUT4 CTLOUT0 CTLOUT1 CTLOUT2 CTLOUT3 TEST OUT0 TEST3 SDRAM CLKIN SDRAM CLKOUT VSS VDD6 SDRAM DQM SDRAM CASN SDRAM BA1 SDRAM BA0 SDRAM CSN SDRAM RASN OE PLL_PVDD PLL_PVSS AVSS_PLL_BE1 AVDD_PLL_BE1 AVSS_PLL_SDI AVSS_PLL_FE AVSS_PLL_BE2 AVDD_PLL_FE AVDD_PLL_SDI AVDD_PLL_BE2 R_VSS R_VDD1.8 R_VSS Reserved Reserved Reserved R_VDD R_VDD R_VDD R_VSS R_VSS R_VSS Reserved Reserved Reserved R_VSS R_VDD R_VSS R_VSS R_VDD R_VDD TEST0 TEST1 TEST2 XTAL IN XTAL OUT VDD9 VSS HSYNC_PORT2 IN_CLK_PORT2 FIELD ID_PORT2 VSYNC_PORT2 VSScore VDDcore8 D1_IN_0 D1_IN_7 D1_IN_6 D1_IN_5 D1_IN_4 D1_IN_3 D1_IN_2 D1_IN_1 Input Processor with Auto Sync and auto Adjust Noise Reducer, Deinterlacer, Frame Rate Converter and SDRAM interface Port 2 8-bit 656 Input Port 1 8/16/24-bit RGB/YCrCb Input Clock Generation PLLs 2Mx32 SDRAM (external) Vertical and Horizontal Scalers Vertical and Horizontal Enhancers Output Processor 16/20/24-bit RBG/YCrCb Digital Outputs RadioFans.CN 46 AVR-1909/789, AVC-1909 FLI2310 Terminal Function ab e 33 0 pde a s Pin No Pin Name I/O Type Voltage ToleranceDrive Pull up/ PulldownDescription 1HSYNC1_PORT1 Input 5v Horizontal sync or reference -CTL1 of Port 1 2VSYNC1_PORT1 Input 5v Vertical sync or reference -CTL1 of Port 1 3FIELD ID1_PORT1 Input 5v Odd/Even Field identification -CTL1 of Port 1 4IN_CLK1_PORT1 Input 5v Data Clock input -CTL1 of Port 1 5HSYNC2_PORT1 Input 5v Horizontal sync or reference CTL2 of Port 1 6VSYNC2_PORT1 Input 5v Vertical sync or reference CTL2 of Port 1 7FIELD ID2_PORT1 Input 5v Odd/Even Field identification CTL2 of Port 1 8VDD1 Power 3.3 V - Power pin for IO 9VSSGround Ground 10IN_CLK2_PORT1 Input 5v Data Clock input CTL2 of Port 1 11B/Cb/D1_0 Input 5v Port 1 Digital video input (Blue/Cb/D1) 12B/Cb/D1_1 Input 5v Port 1 Digital video input (Blue/Cb/D1) 13B/Cb/D1_2 Input 5v Port 1 Digital video input (Blue/Cb/D1) 14B/Cb/D1_3 Input 5v Port 1 Digital video input (Blue/Cb/D1) 15B/Cb/D1_4 Input 5v Port 1 Digital video input (Blue/Cb/D1) 16VDDcore1 Power 1.8 V - Power pin for core 17VSScore Ground Ground 18B/Cb/D1_5 Input 5v Port 1 Digital video input (Blue/Cb/D1) 19B/Cb/D1_6 Input 5v Port 1 Digital video input (Blue/Cb/D1) 20B/Cb/D1_7 Input 5v Port 1 Digital video input (Blue/Cb/D1) 21R/Cr/Cb Cr_0 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 22R/Cr/Cb Cr_1 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 23R/Cr/Cb Cr_2 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 24R/Cr/Cb Cr_3 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 25R/Cr/Cb Cr_4 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 26R/Cr/Cb Cr_5 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 27R/Cr/Cb Cr_6 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 28R/Cr/Cb Cr_7 Input 5v Port 1 Digital video input (Red/Cr/CrCb) 29G/Y/Y_0 Input 5v Port 1 Digital video input (Green/Y) 30VDD2 Power 3.3 V - Power pin for IO 31VSSGround Ground 32G/Y/Y_1 Input 5v Port 1 Digital video input (Green/Y) 33G/Y/Y_2 Input 5v Port 1 Digital video input (Green/Y) 34G/Y/Y_3 Input 5v Port 1 Digital video input (Green/Y) 35G/Y/Y_4 Input 5v Port 1 Digital video input (Green/Y) 36VDDcore2 Power 1.8 V - Power pin for core 37VSScore Ground Ground 38G/Y/Y_5 Input 5v Port 1 Digital video input (Green/Y) 39G/Y/Y_6 Input 5v Port 1 Digital video input (Green/Y) 40G/Y/Y_7 Input 5v Port 1 Digital video input (Green/Y) 41IN_SEL Output 5v 8 mA Output to select external video mux 42 TEST Input 5v Connect to Ground 43DEV_ADDR1 Input 5v Device address setting 1 44DEV_ADDR0 Input 5v Device address setting 0 RadioFans.CN 47 AVR-1909/789, AVC-1909 Pin No Pin Name I/O Type Voltage ToleranceDrive Pull up/ PulldownDescription 45 SCLK I/O5v 8 mA 2-wire serial control bus clock 46 SDATA I/O5v 8 mA 2-wire serial control bus data 47 RESET_N Input 5v PU Reset 48 VDD3 Power 3.3 V Power pin for IO 49 VSScore Ground Ground 50 SDRAM DATA(0) Tristate I/O5v 4 mA PD SDRAM data bus * 51 SDRAM DATA(1) Tristate I/O5v 4 mA PD SDRAM data bus * 52 SDRAM DATA(2) Tristate I/O5v 4 mA PD SDRAM data bus * 53 SDRAM DATA(3) Tristate I/O5v 4 mA PD SDRAM data bus * 54 SDRAM DATA(4) Tristate I/O5v 4 mA PD SDRAM data bus * 55 SDRAM DATA(5) Tristate I/O5v 4 mA PD SDRAM data bus * 56 SDRAM DATA(6) Tristate I/O5v 4 mA PD SDRAM data bus * 57 SDRAM DATA(7) Tristate I/O5v 4 mA PD SDRAM data bus * 58 SDRAM DATA(8) Tristate I/O5v 4 mA PD SDRAM data bus * 59 SDRAM DATA(9) Tristate I/O5v 4 mA PD SDRAM data bus * 60 SDRAM DATA(10) Tristate I/O5v 4 mA PD SDRAM data bus * 61 SDRAM DATA(11) Tristate I/O5v 4 mA PD SDRAM data bus * 62 VDD4 Power 3.3 V Power pin for IO 63 VSS Ground Ground 64 SDRAM DATA(12) Tristate I/O5v 4 mA PD SDRAM data bus * 65 SDRAM DATA(13) Tristate I/O5v 4 mA PD SDRAM data bus * 66 SDRAM DATA(14) Tristate I/O5v 4 mA PD SDRAM data bus * 67 SDRAM DATA(15) Tristate I/O5v 4 mA PD SDRAM data bus * 68 VDDcore3 Power 1.8 V - Power pin for core 69 VSScore Ground Ground 70 SDRAM DATA(16) Tristate I/O5v 4 mA PD SDRAM data bus * 71 SDRAM DATA(17) Tristate I/O5v 4 mA PD SDRAM data bus * 72 SDRAM DATA(18) Tristate I/O5v 4 mA PD SDRAM data bus * 73 SDRAM DATA(19) Tristate I/O5v 4 mA PD SDRAM data bus * 74 SDRAM DATA(20) Tristate I/O5v 4 mA PD SDRAM data bus * 75 SDRAM DATA(21) Tristate I/O5v 4 mA PD SDRAM data bus * 76 SDRAM DATA(22) Tristate I/O5v 4 mA PD SDRAM data bus * 77 SDRAM DATA(23) Tristate I/O5v 4 mA PD SDRAM data bus * 78 SDRAM DATA(24) Tristate I/O5v 4 mA PD SDRAM data bus * 79 SDRAM DATA(25) Tristate I/O5v 4 mA PD SDRAM data bus * 80 VDDcore4 Power 1.8 V Power pin for core 81 VSScore Ground Ground 82 SDRAM DATA(26) Tristate I/O5v 4 mA PD SDRAM data bus * 83 SDRAM DATA(27) Tristate I/O5v 4 mA PD SDRAM data bus * 84 SDRAM DATA(28) Tristate I/O5v 4 mA PD SDRAM data bus * 85 SDRAM DATA(29) Tristate I/O5v 4 mA PD SDRAM data bus * 86 SDRAM DATA(30) Tristate I/O5v 4 mA PD SDRAM data bus * 87 SDRAM DATA(31) Tristate I/O5v 4 mA PD SDRAM data bus * 88 VDD5 Power 3.3 V Power pin for IO RadioFans.CN 48 AVR-1909/789, AVC-1909 Pin No Pin Name I/O Type Voltage ToleranceDrive Pull up/ PulldownDescription 89 VSS Ground Ground 90 TEST IN Input 5V Test input-Connect to ground 91 SDRAM ADDR(10) Tristate O/P5v 8 mA SDRAM address bus * 92 SDRAM ADDR(9) Tristate O/P5v 8 mA SDRAM address bus * 93 SDRAM ADDR(8) Tristate O/P5v 8 mA SDRAM address bus * 94 SDRAM ADDR(7) Tristate O/P5v 8 mA SDRAM address bus * 95 SDRAM ADDR(6) Tristate O/P5v 8 mA SDRAM address bus * 96 VDDcore5 Power 1.8 V Power pin for core 97 VSScore Ground Ground 98 SDRAM ADDR(5) Tristate O/P5v 8 mA SDRAM address bus * 99 SDRAM ADDR(4) Tristate O/P5v 8 mA SDRAM address bus * 100 SDRAM ADDR(3) Tristate O/P5v 8 mA SDRAM address bus * 101 SDRAM ADDR(2) Tristate O/P5v 8 mA SDRAM address bus * 102 SDRAM ADDR(1) Tristate O/P5v 8 mA SDRAM address bus * 103 SDRAM ADDR(0) Tristate O/P5v 8 mA SDRAM address bus * 104 SDRAM WEN Tristate O/P5v 8 mA SDRAM write enable * 105 SDRAM RASN Tristate O/P5v 8 mA SDRAM row address select * 106 SDRAM CASN Tristate O/P5v 8 mA SDRAM column address select * 107 SDRAM BA1 Tristate O/P5v 8 mA SDRAM bank select 1* 108 SDRAM BA0 Tristate O/P5v 8 mA SDRAM bank select 0* 109 SDRAM CSN Tristate O/P5v 4 mA SDRAM CS * 110 SDRAM DQM Tristate O/P5v 8 mA SDRAM DQM * 111 SDRAM CLKOUT Output 5v 12 mA Clock out to SDRAM * 112 VDD6 Power 3.3 V - Power pin for IO 113 VSS Ground Ground 114 SDRAM CLKIN Input 5v Trace delayed SDRAM Clock in 115 TEST3 Input Test input Connect to ground 116 TEST OUT0 Output Test output leave open 117 TEST OUT1 / Interrupt Out Output Interrupt Output 118 CTLOUT0 Tristate O/P 5v 8 mA Control signal output selectable as HSync1/ CSync/HRef/Monitor coast 119 CTLOUT1 Tristate O/P 5v 8 mA Control signal output selectable as VSync1/CRef/VRef/Film Indicator 120 CTLOUT2 Tristate O/P 5v 8 mA Control signal output selectable as Monitor coast/HRef/VDD_en / HSync2 121 CTLOUT3 Tristate O/P 5v 8 mA Control signal output selectable as Film Indicator/VRef/backlight_en/VSync2 122 CTLOUT4 Tristate O/P 5v 8 mA Control signal output selectable as CRef/Field ID/CSync/Monitor coast 123 VDDcore6 Power 1.8 V - Power pin for core 124 VSScore Ground Ground 125 CLKOUT Tristate O/P5v 12 mA Output data rate clock 126 B/U/Pb_OUT_0 Tristate O/P5v 8 mA Digital video output Blue/U/Pb 127 B/U/Pb_OUT_1 Tristate O/P5v 8 mA Digital video output Blue/U/Pb RadioFans.CN 49 AVR-1909/789, AVC-1909 Pin No Pin Name I/O Type Voltage ToleranceDrive Pull up/ PulldownDescription 128 VDD7 Power 3.3 V Power pin for IO 129 VSS Ground Ground 130 B/U/Pb_OUT_2 Tristate O/P5v 8 mA Digital video output Blue/U/Pb 131 B/U/Pb_OUT_3 Tristate O/P5v 8 mA Digital video output Blue/U/Pb 132 B/U/Pb_OUT_4 Tristate O/P5v 8 mA Digital video output Blue/U/Pb 133 B/U/Pb_OUT_5 Tristate O/P5v 8 mA Digital video output Blue/U/Pb 134 B/U/Pb_OUT_6 Tristate O/P5v 8 mA Digital video output Blue/U/Pb 135 B/U/Pb_OUT_7 Tristate O/P5v 8 mA Digital video output Blue/U/Pb 136 R/V/Pr_OUT_0 Tristate O/P5v 8 mA Digital video output Red/V/Pr 137 R/V/Pr_OUT_1 Tristate O/P5v 8 mA Digital video output Red/V/Pr 138 VDDcore7 Power 1.8 V Power pin for core 139 VSScore Ground Ground 140 R/V/Pr_OUT_2 Tristate O/P5v 8 mA Digital video output Red/V/Pr 141 R/V/Pr_OUT_3 Tristate O/P5v 8 mA Digital video output Red/V/Pr 142 R/V/Pr_OUT_4 Tristate O/P5v 8 mA Digital video output Red/V/Pr 143 R/V/Pr_OUT_5 Tristate O/P5v 8 mA Digital video output Red/V/Pr 144 R/V/Pr_OUT_6 Tristate O/P5v 8 mA Digital video output Red/V/Pr 145 R/V/Pr_OUT_7 Tristate O/P5v 8 mA Digital video output Red/V/Pr 146 VDD8 Power 3.3 V Power pin for IO 147 VSS Ground Ground 148 G/Y/Y_OUT_0 Tristate O/P5v 8 mA Digital video output Green/Y 149 G/Y/Y_OUT_1 Tristate O/P5v 8 mA Digital video output Green/Y 150 G/Y/Y_OUT_2 Tristate O/P5v 8 mA Digital video output Green/Y 151 G/Y/Y_OUT_3 Tristate O/P5v 8 mA Digital video output Green/Y 152 G/Y/Y_OUT_4 Tristate O/P5v 8 mA Digital video output Green/Y 153 G/Y/Y_OUT_5 Tristate O/P5v 8 mA Digital video output Green/Y 154 G/Y/Y_OUT_6 Tristate O/P5v 8 mA Digital video output Green/Y 155 G/Y/Y_OUT_7 Tristate O/P5v 8 mA Digital video output Green/Y 156 OE Input 5v Output data enable for Digital video output 157 PLL_PVDD Power 1.8 V Power pin for PLL pads 158 PLL_PVSS Ground Ground for PLL pads 159 AVSS_PLL_BE1 Ground PLL Ground 160 AVDD_PLL_BE1 Power 1.8 V Power pin for PLL 161 AVDD_PLL_BE2 Power 1.8 V Power pin for PLL 162 AVSS_PLL_BE2 Ground PLL Ground 163 AVSS_PLL_SDI Ground PLL Ground 164 AVDD_PLL_SDI Power 1.8 V Power pin for PLL 165 AVDD_PLL_FE Power 1.8 V Power pin for PLL 166 AVSS_PLL_FE Ground PLL Ground 167 DAC_PVSS Ground Ground for DAC pads 168 DAC_VDD Power 1.8 V Digital power pin for DAC 169 DAC_VSS Ground DAC digital Ground 170 DAC_BOUT Output 34 mA Analog B/U output 171 DAC_AVDDB Power 3.3 V Analog power pin for B channel RadioFans.CN 50 AVR-1909/789, AVC-1909 Pin No Pin Name I/O Type Voltage ToleranceDrive Pull up/ PulldownDescription 172 DAC_AVSSB Ground Analog Ground for B channel 173 DAC_GOUT Output 34 mA Analog G/Y output 174 DAC_AVDDG Power 3.3 V Analog power pin for G channel 175 DAC_AVSSG Ground Analog Ground for G channel 176 DAC_ROUT Output 34 mA Analog R/V output 177 DAC_AVDDR Power 3.3 V Analog power pin for R channel 178 DAC_AVSSR Ground Analog Ground for R channel 179 DAC_COMP