Arcam-AVR400-avr-sm维修电路图 手册.pdf

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1、AVR400 Service Manual Issue 1 RadioFans.CN 2 3 1 4 ITEM NO.PART No.DESCRIPTIONQTY 1TGP3523 / TGP3524FASCIA BLACK / SILVER1 2TGP3526 / TGP3527COVER BLACK / SILVER1 3HA4V06STORX SCREW M4 x 64 4TGP3535FRONT PCB ASSY1 80 5 5 TOLERANCES UNLESS 0.000.10 OTHERWISE STATED 0.0 0.20 ANGULAR TOL. +2 DEGREES 07

2、090 ALL DIMENSIONS IN MILL METERS UNLESS OTHERWISE STATED 20 E F 6 DATE: DRAWN BY: 13 F A3 A 4 CHECKED BY: 4 MATERIAL: B C DRAWING TITLE 10 A 30 ORIGINAL SCALE 1:4 FINISH: 8 50 2 287 6 D SHT 1 OF 4 7 A this is brought back to +5V after D643, to feed the relay IC66 is noteworthy because it continues

3、working when the amplifier is in standby. It takes a second input from the +9V standby power supply on the Power Amplifier PCB D616 acts as a gate to prevent this from feeding back to the +15V supply when the system is in standby. It also allows the +15V supply to override and remove the load from t

4、he +9V supply when the amplifier is fully booted up. D606 and D607 form half of a second bridge rectifier (with the other two diodes coming from the full bridge rectifier D601). These diodes charge up the 1F/50V capacitor C604 to +15V, generating a “mains power present” signal. The 10K resistor R614

5、 in parallel with C604 continually discharges it so that this signal effectively disappears within about 50 milliseconds of the mains being switched off. This +15V goes to the Main Board via pin 8 of BN62, where it is used as a “pull up” signal to help control the vari- ous audio muting circuits. AV

6、R400 Front Panel Board Circuit Description The Front Panel Board is a double-sided PTH PCB. It contains the VFD (Vacuum Fluorescent Display) and its associated electronics, plus the keyboard, power status LED, IR remote receiver and headphones amplifier. A daughter board carries the front panel I/O

7、socketry. See page 1 of the schematic diagram. RadioFans.CN It communicates with the Input Board via CN101 and a 31 way ribbon cable. Other connectors comprise CN94 which connects to two secondaries of the main power transformer and the hard wired BN93 which connects up the daughter board. There are

8、 two associated break off boards. One houses the front panel mounted single pole mains switch plus its suppression capacitor C901 and a connector BN502. The second is mounted on the power amplifiers heatsink and is used to route power to the cooling fans and also to guide the 31 way ribbon cable. Th

9、e VFD draws AC filament power from a centre tapped winding of the power transformer connected to pins 1, 2, and 3 of CN94. The centre tap connects to ground via the zener diodes D901/2 and C903 to provide the filament with its required DC offset. Pins 4 and 5 connect to a relatively high voltage tra

10、nsformer secondary which is half wave rectified by D916 and smoothed by C907 and C960. The zener diodes D903 and D904 in series with R906 generate +40V which is then coupled to the emitter follower Q901 to provide a nominal regulated 40V HT power rail for the VFD. The VFDs internal driver IC and ext

11、ernal data bFfer IC901 run from the main +5V supply generated in the Power Supply board and routed onwards through the Input Board. The drive signals (data, clock, chip select and reset) come directly from the system microprocessor via CN101. The 12 front panel switches are arranged in 2 blocks of 6

12、 with resistive divider chains connected to two ADC inputs on the system micro. These have 10K pull-up resistors at the system P end to complete the potential divider chains. The pnp switching transistors Q906 and Q907 turn on the 3V3 supply from the system P via another 10K pull-up resistor at the

13、P end to provide interrupt control. The power status LED D905 is a tri-colour type. The green side indicates power on and the red side standby. A high signal on the LED net turns on Q902 and Q903. This turns off the npn Q913 to disable the red LED and turns on the pnp Q912 to enable power to the gre

14、en LED. The reverse is true when the LED line is low. Pulling the STB(LED) line low when the LED line is also low powers both LEDs and gives a yellow light to show when the unit is booting up. Note that the power supply is STBY+5V to allow the red LED to operate in standby mode. RC901 is a Kodenshi

15、KSM603TH5B encapsulated infra red receiver for processing commands from an external IR remote control. It is designed to work with the 36-38kHz carrier frequencies associated with the Philips RC5 protocol. Note that it operates from the ST+5V rail to enable the AVR400 to be woken up. It does not dem

16、odulate the IR this is done by the system microprocessor. The headphones amplifier IC902 drives external headphones directly via the 330F series capacitors C935 and C936. IC902 has a gain of about 4, meaning that the headphones output will be about 4V rms when the volume control is set to clip the L

17、 and R main power amplifiers (equivalent to about 120WPC into 8 ohms). IC902 is a JRC NJM5556AL capable of driving 7V rms into150 ohm loads and about +/- 100mA peak current into lower impedances. Mute transistors Q904/905 in series with 100R resistors are fitted in front of its input to minimize swi

18、tching transients and it is powered from the +/-15V supplies generated on the Power Supply Board. The L and R headphones outputs go via BN93 to the Headphones Board, after passing through relay RL902 which is normally off. A positive voltage from the P at the emitter of pnp Q911 turns on Q911 and ge

19、nerates the same positive voltage at the base of the npn transistor Q909. Because its emitter is connected to the -15V rail this pulls the relay on. The FRONT AUX and MIC inputs come from the Headphones Board and through the microphone relay RL901. When the relay is off the AUX line level L and R si

20、gnals are switched through to the unity gain bFfer IC904 and then on to the Input Board via pins 3 and 1 of CON101. When the relay is closed (in RadioFans.CN the same manner as described above for RL902) then the L front input is routed to the low noise micro- phone amplifier IC903. This operates as

21、 two cascaded virtual earth amplifiers, each with a voltage gain of approximately 21 (R961/960 and then R965/962). Note the MIC line is biased at +6V via resistors R956, R957 and R958. The amplified signal is output to the Input Board on pin 5 of CON101. AVR400 Input Board Circuit Description The In

22、put Board comprises a 4 layer PCB; this is attached directly to the back panel via its various sock- ets and to the heatsink by two steel brackets. It is positioned underneath the HDMI Board and above the Main Board. 5 ribbon cable sockets connect it to the other 4 boards. CN71 connects it to a daug

23、hter board containing two 9 Pin D socket connectors (an RS232 serial port and an iPod dock interface), plus two 12V trigger sockets and 2 IR receiver sockets. Note some passive components are mounted on the underside of the PCB. The Input Board circuitry is shown on pages 2 5 of the schematic diagra

24、m. Page 2 covers the analogue inputs, volume control and line level outputs. Page 3 covers the SPDIF (digital) inputs, clock recovery, audio DSPs and the codec (stereo ADC plus 8-channel DAC). Page 4 covers the system microprocessor and a slaved support microprocessor Page 5 covers interfaces to the

25、 DAB/Ethernet module, and the boot loader microprocessor used to update the system SW via USB. Analogue inputs, volume control and outputs IC101 is a Renesas R2A15218FP analogue multiplexer and volume control, with a gain range of +42 to -95dB in 0.5dB steps. It is digitally controlled from the syst

26、em microprocessor via the I2C bus on pins 49 and 50. A high logic signal on pin 51 enables the system mute. IC101 has +/- 7V supplies generated from the +/-15V rails with the regulators IC102 and IC103. All stereo external line level inputs using phono sockets are routed to IC101 via 100R/220pF low

27、pass CR filters. IC101 also handles the AUX-L, AUX-R and the (mono) MIC_SIGNAL setup microphone inputs coming from the front panel, plus the internal stereo outputs from AM/FM tuners (TUN-L and TUN-R) and the DAB/ethernet receiver (VENICE_L and VENICE_R). IC101 additionally switches two multichannel

28、 signals - the 8 channel direct input and the outputs from the 8 post-DAC filters. Note that the +/- 7V power supply limits the input signals to approximately 4V rms before overload occurs. The post-DAC filters comprise 4 low noise NJM2068 dual op amps, running from the +/- 7V supplies. One op amp i

29、s assigned to each channel and performs the dual functions of converting a differential input from the DAC to a single ended output, whilst simultaneously functioning as a three pole 50kHz active filter. The AM/FM tuner modules outputs pass through the inductors L310 and L302 (providing 19kHz notch

30、and 38 kHz low pass filtering) and the shunt mute circuits formed by the 330R resistors R354/R369 and the two halves of Q306 plus Q307. IC101 has a fixed level stereo output for Zone 2 (SUB_L and SUB_R) and a second one, adjustable from 0dB to -18dB in 6dB steps, for the AVR400s analogue to digital

31、converter (ADC_L and ADC_R). RadioFans.CN IC101 has one 8 channel variable level output bus labelled VOL01 through to VOL08. Capacitors C295-8 and C231-4 float the ground ends of the associated internal potentiometers to minimize clicks This bus goes via specially selected 100F/25V capacitors to the

32、 dual op amps IC121-124, wired as voltage follow- ers and running from the +/- 15V supplies. The C, SL, SR, SBL and SBR outputs are shunt muted when required via the 560R resistors R383-388 and the dual transistors Q303-305. The subwoofer output SW has two shunt mute circuits. One using Q311 works i

33、n parallel with the rest of the channels. The other, using Q308 and half of Q303 allows muting of the SW channel alone. The FL and FR channels take off the stereo headphones amplifier feed from IC121 (it goes via the con- nector WF101 to the Front Panel Board), then add an extra dual voltage followe

34、r IC125 and a double pole shunt mute switch using 4 x 270R resistors and Q301-302. All the above ICs are JRC NJM2068s or equivalent. All 8 of these outputs go to via the connector WF103 to the preamplifier output sockets and (except for the subwoofer output) to the 7 power amplifier inputs located o

35、n the Main Board. The ADC input amplifiers use a JRC NJM2068 for each channel, operating as a single-ended input to differential output converter, with HF filtering above about 400kHz. This is sFficient for anti-aliasing purposes as the analogue modulator of the ADC samples at 6.144 MHz and only nee

36、ds to keep out frequencies above 6MHz. The array of 12 switching transistors in the bottom right hand corner of the schematic is arranged in 4 blocks of 3 devices (two npn and one pnp per block). The array is used to control the muting of 4 specific groups of audio outputs, taking into account the p

37、resence of AC mains via P_U (the pull up line from the Power Supply board) and the MUTE_POWER line derived from the power amplifiers Vcc rail this is normally high when Vcc is high. The output lines are SB_MUTE2 (for the surround back chan- nels SBL and SBR), ZONE2_MUTE2, HP_MUTE2 (for the headphone

38、s relay on the Front Panel board) and FUNC_MUTE2 (for the 6 main audio channels excluding SBL and SBR). Zone 2 volume is independently adjustable in 1dB steps via IC131 (rohm BD3812F). Its outputs are bFfered and amplified 15dB by the dual op amp IC132 and can be muted when required by Q402. The out

39、put goes directly to two phono sockets forming half of JK11 on the back panel. SPDIF inputs, ADCs, DACs and Audio DSPs The AVR400 has 4 coaxial 75 ohm SPDIF (Sony/Philips Digital InterFace) inputs and 2 TOSLINK optical inputs on its back panel. A further optical input is located on the front panel a

40、s part of JK92 (this socket also includes the AUX and MIC inputs). There are 6 further external SPDIF inputs - one per HDMI input socket and one on the HDMI output socket (the Audio Return Channel or ARC). Each of the 4 coaxial inputs is bFfered by two NOR gates, contained in IC159 and IC160, before

41、 being switched by one half of the dual 4 input multiplexer IC147. The output on pin 7 is then sent to the 8 input multiplexer IC140. Its other 6 inputs comprise the 3 optical receivers already mentioned, the HDMI input (multiplexed down from 5:1 on the HDMI board), the HDMI ARC and the output of th

42、e Venice 6 DAB/Ethernet module. The 8th input is unused. The output MUX_SPDIF is sent to the SPDIF receiver IC153. IC153 is a Wolfson WM8804 run in hardware mode. It uses X707 to generate its own 12MHz internal clock. IC153 automatically identifies and dejitters incoming SPDIF signals with sample ra

43、tes of 32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz and 192kHz. Its output, still in SPDIF format, WM_SPDIF, is sent to pin 43 of the system codec IC143. RadioFans.CN IC143 is the Cirrus Logic CS42548. It includes an SPDIF receiver, 2 channel ADC and 8 channel DAC. Only one input (pin 43) of the SPDIF rece

44、iver is used; the others are grounded. IC143 has +5V analogue supplies, locally decoupled to analogue ground by C721/722 for VA (pin 24) and C703/704 for VARX (pin 41). The digital supply is also +5V, decoupled to digital ground by C705/706 (pin 5) and C750/756 (pin 51). The control port power VLC (

45、pin 6) is 3V3, decoupled to digital ground by C752/773 and the serial port power VLS (pin 53) is also +3V3, decoupled to digital ground by R726 and C753/754. The 3V3 is generated from the +5V supply by the linear regulator IC148. The system master audio clock is generated by IC143 on pin 55 whenever

46、 an SPDIF signal is present (i.e. in all cases except when an HDMI multichannel signal in I2S is required to be processed or when using the ADC). Although IC143 has no jitter rejection below 20kHz its master clock is kept clean from incom- ing jitter by IC153. The PLL filter is located at pin 39. Wh

47、en SPDIF is not in use IC143 inputs its clock on pin 59 this can be 24.576 MHz from the crystal oscillator X701 associated with DSP1 when ADC mode is engaged, or the recovered clock from the HDMI Board. This is switched by the 4 way change over mul- tiplexer IC145 on pins 9, 10 and 11. IC145 also ro

48、utes IC143s recovered master clock or the HDMI master clock to DSP1 on pins 5, 6 and 7. Pins 1, 62, 63 and 64 receive the 24 bit serial audio data that has been processed by the DSPs. The DACs 8 analogue outputs are in differential mode, so making 16 output lines in total, from pins 20-23 and 26-37.

49、 These feed the post-DAC filters IC111-114, described above. The main audio DSP is a Cirrus Logic CS 497024, IC141.This is a 300MIPS dual core 32 bit fixed point DSP, with 72 bit accumulators. The first core is used for decoding standard and high definition audio formats (Dolby, DTS etc) and the second is reserved for post processing such as bass management, delay and room correction. The secondary DSP, IC142, is a Cirrus Logic CS49DV8, responsible for the Dolby Volume processing. IC141 gets the 1.8V for its core from the 3-terminal regulator IC149. IC142 gets its 1.8V fro