HarmanKardon-AVR130-avr-sm1维修电路原理图.pdf
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1、AVR 130 Audio/VideoReceiver SERVICE MANUAL DIGITALLOGIC 7VID 1DVD CD FMAM TAPE 6 CH VID 2 VID 3 PRO LOGIC 3 STEREO DSP 5 CH. STEREO SURR. OFF Surr. Select Coaxial RDS Power for the Digital Revolution RadioFans.CN 收音机爱 好者资料库 TECHNICAL SPECIFICATIONS Technical Specifications Audio Section Stereo Mode
2、Continuous Average Power (FTC) 50 Watts per channel, 20Hz20kHz, 0.07% THD, both channels driven into 8 ohms Five-Channel Surround Modes Power Per Individual Channel Front L input or output mode selected by software; input or push-pull output. Software assignable pull-up. Alternately, P0.0-P0.7 can b
3、e used as the PG output port (PG0-PG7). D 80-73 PG0-PG7 P1.0 - P1.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. D 72-65 P2.0 - P2.7 I/O Bit programmable port; input or output mode selected by software; input or push-pu
4、ll output. Software assignable pull-up. Alternately, P2.0P2.7 can be used as I/O for TIMERA, TIMERB, D/A, SIO D,D-2 8-1 SO SI SCK DAOUT TBPWM TACK TACAP TAOUT P3.0 - P3.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. Alt
5、ernately, P3.0P3.7 can be used as I/O for TIMERC0/C1, TIMER10/11 D 3023 T1CK0 T1CK1 T1CAP0 T1CAP1 T1OUT0 T1OUT1 TCOUT0 TCOUT1 RadioFans.CN 收音机爱 好者资料库 S3C84BB/F84BB PRODUCT OVERVIEW Table 1-1. S3C84BB/F84BB Pin Descriptions (80-QFP) (Continued) Pin Name Pin Type Pin Description Circuit Type Pin Numbe
6、r Share Pins P4.0 - P4.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. P4.0-P4.7 can alternately be used as inputs for external interrupts INT0-INT7, respectively (with noise filters and interrupt controller) D-1 38-31 I
7、NT0 INT7 P5.0 - P5.7 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assignable pull-up. Alternately, P5.0P5.3 can be used as I/O for serial por, UART0, UART1, respectively. G 22-17,11-9 TxD1 RxD1 TxD0 RxD0 P6.0 - P6.7 O N-channel, open-drain
8、 output only port. F 5854,51-49 P7.0 - P7.7 I General-purpose digital input ports. Alternatively used as analog input pins for A/D converter modules. E 48-45,42-39 ADC0- ADC7 P8.0 - P8.5 I/O Bit programmable port; input or output mode selected by software; input or push-pull output. Software assigna
9、ble pull-up. P8.4, P8.5 can alternately be used as inputs for external interrupts INT8, INT9, respectively (with noise filters and interrupt controller) D,D-1 64-59 INT8,INT9 RadioFans.CN 收音机爱 好者资料库 PRODUCT OVERVIEW S3C84BB/F84BB Table 1-1. S3C84BB/F84BB Pin Descriptions (80-QFP) (Continued) Pin Nam
10、e Pin Type Pin Description Circuit Type Pin Number Share Pins AD0 - AD7 I Analog input pins for A/D converter module. Alternatively used as general-purpose digital input port 7. E 4845 4239 P7.0P7.7 AVREF, AVSS - A/D converter reference voltage and ground - 43, 44 - RxD0, RxD1 I/O Serial data RxD pi
11、n for receive input and transmit output (mode 0) D 18, 21 P5.3, P5.1 TxD0, TxD1 O Serial data TxD pin for transmit output and shift clock input (mode 0) D 20, 22 P5.2, P5.0 TACK I External clock input pins for timer A D 3 P2.5 TACAP I Capture input pins for timer A D 2 P2.6 TAOUT O Pulse width modul
12、ation output pins for timer AD 1 P2.7 TBPWM O Carrier frequency output pins for timer B D 4 P2.4 TCOUT0 TCOUT1 O Timer C 8-bit PWM mode output or counter match toggle output pins D 24,23 P3.6,P3.7 T1CK0 T1CK1 I External clock input pins for timer 1 D 39,30 P3.0,P3.1 T1CAP0 T1CAP1 I Capture input pin
13、s for timer 1 D 28,27 P3.2,P3.3 T1OUT0 T1OUT1 O Timer 1 16-bit PWM mode output or counter match toggle output pins D 26,25 P3.4,P3.5 SI,SO,SCK I/O Synchronous SIO pins D 7,8,9 P2.1,P2.0, P2.2 RESETB I System reset pin (pull-up resistor: 240 k) B 19 - TEST I Pull down register connected internally -
14、16 - VDD1, VDD2, VSS1, VSS2 - Power input pins - 12,53, 13,52 - XIN, XOUT - Main oscillator pins - 15,14 - RadioFans.CN 收音机爱 好者资料库 U-COM IC PIN ASSIGNMENT & DESCRIPTIONS I PIN ASSIGNMENT (IC72) (TOP VIEW) (FPT-100P-M06) 1P20/A16 P21/A17 P22/A18 P23/A19 P24/A20/PPG0 P25/A21/PPG1 P26/A22/PPG2 P27/A23/
15、PPG3 P30/A00/AIN0 P31/A01/BIN0 VSS P32/A02/ZIN0 P33/A03/AIN1 P34/A04/BIN1 P35/A05/ZIN1 P36/A06 P37/A07 P40/A08/SIN2 P41/A09/SOT2 P42/A10/SCK2 P43/A11 P44/A12 VCC P45/A13 P46/A14/OUT4 P47/A15/OUT5 P70/SIN0 P71/SOT0 P72/SCK0 P73/TIN0 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 2
16、7 28 29 30 X0A X1A P57/CLK RST P56/RDY P55/HAK P54/HRQ P53/WRH P52/WRL P51/RD P50/ALE PA3/OUT3 PA2/OUT2 PA1/OUT1 PA0/OUT0 P97/IN1 P96/IN0 P95/PPG5 P94/PPG4 P93/FRCK/ADTG/CS3 P92/SCK1/CS2 P91/SOT1/CS1 P90/SIN1/CS0 P87/IRQ7 P86/IRQ6 P85/IRQ5 P84/IRQ4 P83/IRQ3 P82/IRQ2 MD2 80 79 78 77 76 75 74 73 72 71
17、 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 31P74/TOT0 P75 P76 P77 AVCC AVRH AVSS P60/AN0 P61/AN1 P62/AN2 P63/AN3 Vss P64/AN4 P65/AN5 P66/AN6 P67/AN7 P80/IRQ0 P81/IRQ1 MD0 MD1 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 P17/AD15/D15 P16/AD14/D14 P15/AD13/D13 P14/AD12/D1
18、2 P13/AD11/D11 P12/AD10/D10 P11/AD09/D09 P10/AD08/D08 P07/AD07/D07 P06/AD06/D06 P05/AD05/D05 P04/AD04/D04 P03/AD03/D03 P02/AD02/D02 P01/AD01/D01 P00/AD00/D00 VCC X1 X0 VSS 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 RadioFans.CN 收音机爱 好者资料库 MB90482 I PIN DESCRIPTIONS (IC72) (Continue
19、d) Pin No. Pin name Circuit type Function LQFP*1QFP*2 8082X0AOscillator pin 8183X1AOscillator pin 7880X0AA32 kHz oscillator pin 7779X1AA32 kHz oscillator pin 7577RSTBReset input pin 83 to 90 85 to 92 P00 to P07 C (CMOS) This is a general purpose I/O port. A setting in the pull-up resistance setting
20、register (RDR0) can be used to apply pull-up resistance (RD00-RD07 = “1”) . (Disabled when pin is set for output.) AD00 to AD07 In multiplex mode, these pins function as the external address/ data bus low I/O pins. D00 to D07 In non-multiplex mode, these pins function as the external data bus low ou
21、tput pins. 91 to 98 93 to 100 P10 to P17 C (CMOS) This is a general purpose I/O port. A setting in the pull-up resistance setting resister (RDR1) can be used to apply pull-up resistance (RD10-RD17 = “1”) . (Disabled when pin is set for output.) AD08 to AD15 In multiplex mode, these pins function as
22、the external address/ data bus high I/O pins. D08 to D15 In non-multiplex mode, these pins function as the external data bus high output pins. 99, 100, 1,2 1 to 4 P20 to P23 E (CMOS/H) This is a general purpose I/O port. When the bits of external address output control register (HACR) are set to 1 i
23、n external bus mode, these pins function as general purpose I/O ports. A16 to A19 When the bits of external address output control register (HACR) are set to 0 in multiplex mode, these pins function as address high output pins (A16-A19). A16 to A19 When the bits of external address output control re
24、gister (HACR) are set to 0 in non-multiplex mode, these pins function as address high output pins (A16-A19). 3 to 65 to 8 P24 to P27 E (CMOS/H) This is a general purpose I/O port. When the bits of external address output control register (HACR) are set to 1 in external bus mode, these pins function
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