Onkyo-HTR640-avr-sm维修电路原理图.pdf

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1、HT-R640 SERVICE MANUAL Ref. No. 3951 082006 AV RECEIVER MODEL HT-R640 HT-R640 Black, Silver models 230-240V AC, 50HzS MPP SAFETY-RELATED COMPONENT WARNING! COMPONENTS IDENTIFIED BY MARK ON THE SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK. REPLACE THESE COM

2、PONENTS WITH ONKYO PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL. MAKE LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY INSULATED FROM THE SUPPLY CIRCUIT BEFORE RETURNING THE APPLIANCE TO THE CUSTOMER. B MDD120V AC, 60Hz RC-668M(MDD) MUTING PREVIOUS

3、 MENU GUIDE TOP MENU SETUPRETURN PLAYLIST/CATPLAYLIST/CAT RANDOMSUBTITLE PLAY MODE AUDIOREPEAT RC- 668M -/- TAPE MD/CDR HDD CABLE ON/STANDBY DIMMER ENTD TUN SLEEP 101112 INPUT SELECTOR HDDDVDVCR REMOTE MODE V1 V4 V2V3 CDTAPETUNER DVDMULTI CH LISTENING MODE TV DISPLAY TESTTONECH SEL SURROUNDSTEREO CI

4、NE FLTR LEVEL+LEVEL- L NIGHT VOLVOL SAT VCR TV DVDRECEIVER CD INPUT +10 0CLR 123 456 789 ENTER CH DISC ALBUM AUDYSSEY RC-669M(MPP) HT-R640 RadioFans.CN 收音机爱 好者资料库 HT-R640 SERVICE PROCEDURE 1. Replacing the fuses This symbol located near the fuse indicates that the fuse used is show operating type, F

5、or continued protection against fire hazard, replace with same type fuse, For fuse rating, refer to the marking adjacent to the symbol. Ce symbole indique que le fusible utilise est e lent. Pour une protection permanente, nutiliser que des fusibles de meme type. Ce demier est indique la qu le presen

6、t symbol est apposre. 2. To initialize the unit The AV receiver uses a battery-less memory backup system in order to retain radio presets and other settings when its unplugged or in the case of a power failure. Although no batteries are required, the AV receiver must be plugged into an AC outlet in

7、order to charge the backup system. Once it has been charged, the AV receiver will retain the settings for several weeks, although this depends on the environment and will be shorter in humid climates. 1. Press and hold down the VIDEO 1/VCR 1 button, then press the STANDBY/ON button when the unit is

8、Power on. 2. After Clear is displayed, the preset memory and each mode stored in the memory are initialized and will return to the factory settings. 4. Memory Backup Main microprocessor Q701 only. 1. Press and hold down the DISPLAY button , then press the STANDBY/ON button when the unit is Power on.

9、 The version is displayed on FL display for 3 seconds. 2. Press the STANDBY/ON button to Power off. 3. To check the version of microprocessor Main1.01/05305A Ex. REF NO.PART NAMEDESCRIPTIONPART NO.REMARKS F901FUSE10A-UL/T-233252330GR!, F901 orFUSE10A-T/UL-ST2252333GR!, F901 orFUSE5A-SE-TL250V252278G

10、R!, F910FUSE5A-UL/T-233252326GR! F910 orFUSE5A-T/UL-ST2252258GR! F6901FUSE12A-TUL-250V252301GR! F6902FUSE12A-TUL-250V252301GR! : HT-R640 European model : HT-R640 USA model F901FUSE5A-SE-EAK252078GR!, F903FUSE2.5A-SE-EAK252075GR!, F903FUSE5A-UL/T-233252326GR!, F903 orFUSE2.5A-SE-TL250V252275GR!, F903

11、 orFUSE5A-T/UL-ST2252258GR!, RadioFans.CN 收音机爱 好者资料库 OPERATION CHECK-1 SPEAKER PROTECT-1 (DC VOLTAGE DETECTION) 1. Press and hold down the CD button, then press the STANDBY/ON button while the unit is Power ON. Test - _ is displayed only for 5 seconds. 2. Press the VIDEO 3 button, while the characte

12、rs of Test - _ are displayed. The unit will be in the state of Test-4-00 . 3. Repeatedly press TONE+ button until the characters of Test-4-21 are displayed. Procedure No load. No input. Test - _ Test - 4-00 When 1. Exchange power transistors (Q6050 - Q6054, Q6060 - Q6064). 2. Exchange amplifier PC b

13、oard assy (NAAF-8911). Test - 4-21 Check whether the operation starts and continues automatically as follows. Test - 4-21 Test - 4-22 Test - 4-25 Test - 4-23 Test - 4-24 Protect OK Protect OK ProtectProtect OK Protect OK Protect OK Test - 4-35 Clear Turn off Front L ch Check If all channels are OK,

14、the characters of Test - 4 - 35 are displayed. 4. Press the STANDBY/ON button. Front R ch Check Center ch Check Surround L ch Check Surround R ch Check Blinks HT-R640 OPERATION CHECK-2 SPEAKER PROTECT-2 (CURRENT DETECTION) 1. Press and hold down the CD button, then press the STANDBY/ON button while

15、the unit is Power ON. Test - _ is displayed only for 5 seconds. 2. Press the VIDEO 3 button, while Test - _ is displayed. The unit will be in the state of Test-4-00 . 3. Repeatedly press TONE + button until Test-4-35 is displayed. 4. Connect the dummy load of 3 ohms to the Front L ch speaker termina

16、l. At this time, confirm that the speaker relay is not turned off. 5. Connect the dummy load of 1 ohm to the Front L ch speaker terminal. At this time, confirm that the speaker relay is turned off and Protect is displayed. Disconnect the dummy load immediately after checking the display of Protect .

17、 6. Check other channels according to the same procedure as 4 and 5. Procedure No input. Do not check two or more channels at the same time. Do not connect a dummy load to speaker terminal longer than 2 seconds. Test - _ Test - 4-00 When 1. Exchange power transistors (Q6050 - Q6054 Q6060 - Q6064. 2.

18、 Exchange amplifier PC board assy (NAAF-8911). Test - 4-35 Clear Turn off 7. Press the STANDBY/ON button. Test - 4-35 Protect Test - 4-35 Blinks HT-R640 OPERATION CHECK-3 CONTROL OF POWER SUPPLY (OUTPUT SENSOR AND THERMAL SENSOR) Test - _ Test - 4-00 Test - 4-37 Clear Turn off Test - 4-37 FM STEREO

19、Blinks Ver. 0.50/05131a T: 25 C/ 77 F Clear Turn off Output sensor 1. Press and hold down the CD button, then press the STANDBY/ON button while the unit is Power ON. Test - _ is displayed only for 5 seconds. 2. Press the VIDEO 3 button while Test - _ is displayed. The unit will be in the state of Te

20、st-4-00 . 3. Repeatedly press TONE+ button until Test-4-37 is displayed. 4. At this time, confirm that the red characters of FM STEREO is displayed. And, check relay RL6901 and RL6902 are turned off in 2 or 3 seconds. 5. Press the STANDBY/ON button. Procedure No output. No input. When 1. Exchange po

21、wer transistors (Q6050 - Q6056, Q6060 - Q6066). 2. Exchange power amplifier PC board assy (NAAF-8911). 3. Exchange thermal sensor PC board assy (NAETC-8913). Thermal sensor 1. Press and hold down the DISPLAY button, then press the STANDBY button when the unit is power ON. Ver. 0.50/05131a is display

22、ed only for 2 seconds. 2. Press the TONE button while Ver.0.50/05131a is displayed. 3. Confirm that the displayed temperature is within +/-20 degree C from the ambient temperatures. 4. Press STANDBY/ON button. HT-R640 HT-R640 OPERATION CHECK-4(1/2) DSP DEBUG MODE E1A48K0N/OFFPoO Ver. 0.50/05131a 142

23、56871039 The operation of DSP is able to checked by the information displayed on FL in this debug mode. This information will help to pursue the cause of trouble. UNLOCK E = UNLOCK = LOCK 1 Digital Selector 0 = None 1 = OPT 3 2 = OPT 2 3 = OPT 1 4 = COAX 1 5 = COAX 2 7 = FRONT 2 Sampling Frequency a

24、nd Emphasis 32K = 32 kHz without Emphasis 44K = 44.1 kHz without Emphasis 48K = 48kHz without Emphasis 64K = 64 kHz 4 DIR Detect Type 0 = Analog 1 = PCM 2 = Not PCM 3 = Data 4 = DTS CD (Not used) 5 = Multich 6 = Not Decided 5 DSP Detect Format P = PCM (Analog) D = Dolby Digital d = DTS A = AAC ? = U

25、NKNOWN 9 DSP Decode o = Decode OK x = Decode NG 10 To set in DSP debug mode 1. Press and hold down the DISPLAY button, then press the STANDBY button while the unit is power ON. The version number of microprocessor is displayed only for 2 seconds. 2. Press the DISPLAY button while DSP :06421A is disp

26、layed. The status of DSP and DIR will be displayed. To exit Press STANDBY/ON button. - DIR - DIR Status D = Digital A = Analog M = Multich P = Multich PCM p = PCM Fixed d = DTS Fixed 3 - DSP - Content of display CODEC CLOCK MODE N = Normal U = Up Sampling H = High Sampling (Double Rate) D = Down Sam

27、pling Q = Quad Rate 6 DSP Port 0 = NIC 1 = DEC 2 = BUSY 3 = EXEC WAIT 04 = Boot 11 = Restart FF = Free 7 11 6 = HDMI 88K = 88.2 kHz 96K = 96 kHz 176 = 176.4 kHz 192 = 192 kHz 32e = 32 kHz with Emphasis 44e = 44.1 kHz with Emphasis 48e = 48 kHz with Emphasis DSP Sequence8 Mute11 = Selector IC(Q5501)

28、= DSP(Q201) = DIR(Q301) (Normal state) (Abnormal state) - Main Micro Processor - 0 1 2 3 1. Press the TONE+ button within 2 seconds above, the version number of DSP is displayed. DSP :06421A HT-R640 OPERATION CHECK-4(2/2) This debug mode will help in digital audio no sound trouble. Check information

29、 on FL display and the related devices or circuits. Trouble Cause Analysis by Debug Mode Symptom on display Cause Check E is displayedNo input signal to DIRRelated devices from digital input to Q301 Displayed freq. is different from input No input signal to DIRRelated devices from digital input to Q

30、301 Displayed format is different from input No input signal to DIRRelated devices from digital input to Q301 04 or 11 do not change to FF ROM or RAM error Q281, Q282 not connected if external clock source is used. 29XTALIInput terminal for 27MHz crystal oscillator or connection for external oscilla

31、tor with CMOS-compatible square wave clock signal 36PWRDNIPower-Down Enable. A logical low will place part in a power-down status. 37ELPFIThis pin is used for the External Loop Filter that is required for the LLC PLL. 38PVDDP 39PVSSG HS or Horizontal Sync. A dual-function pin, (OM_SEL1:0 = 0, 0) is

32、a programmable horizontal sync output signal. The rising and falling edges can be controlled by HSB9:0 and HSE9:0 in steps of 2 LLC1. The polarity of the HS signal is controlled by the PHS bit. HACTIVE (OM_SEL1:0= 1, 0 or 0, 1) is an output signal that is active during the active/viewable period of

33、a video line. The active portion of a video line is programmable on the ADV7183. The polarity of HACTIVE is controlled by PHS bit. 2 Q4001: ADV7183 (Advanced Video Decoder with 10-Bit ADC and Component Input Support) HT-R640 IC BLOCK DIAGRAM AND TERMINAL DESCRIPTIONS -5 PinMnemonicInput/OutputFuncti

34、on 40, 47, 53, 56, 63 41, 43, 45, 57, 59, 61 42, 44, 46, 58, 60, 62 48, 49 50 51 52 54, 55 64 65 66 67 68 69 70 77 78 79 80 AVSS AVSS1-6 AIN1-6 CAPY1-2 AVDD REFOUT CML CAPC1-2 ISO ALSB SDATA SCLK VREF/VRESET HREF/HRESET RD DV FIELD G G I I P O O I I/O I I I/O I O O I O I O Ground for Analog Supply A

35、nalog Input Channels. Ground if single-ended mode is selected. These pins should be connected directly to REFOUT when differential mode is selected. ADC Capacitor Network Analog Supply Voltage (5 V) Internal Voltage Reference Output Common-Mode Level for ADC ADC Capacitor Network System Reset Input.

36、 Active Low. Input Switch Over. A low to high transition on this input indicates to the decoder core that the input video source has been changed externally and configures the decoder to reacquire the new timing information of the new source. This is useful in applications where external video muxes

37、 are used. This input gives the advantage of faster locking to the external muxed video sources. A low to high transition triggers this input. TTL Address Input. Selects the MPU address: MPU address = 88h ALSB = 0, disables I C filter 2 MPU address = 8Ah ALSB = 1, enables I C filter 2 MPU Port Seria

38、l Data Input/Output MPU Port Serial Interface Clock Input VREF or Vertical Reference Output Signal. Indicates start of next field. VRESET or Vertical Reset Output is a signal that indicates the beginning of a new field. In SCAPI/CAPI mode this signal is one clock wide and active low relative to CLKI

39、N. It immediately follows the HRESET pixel, and indicates that the next active pixel is the first active pixel of the next field. HREF or Horizontal Reference Output Signal. A dual-function pin (enabled when Line-Locked Interface is selected, OM_SEL1:0 = 0,0), this signal is used to indicate data on

40、 the YUV output. The positive slope indicates the beginning of a new active line; HREF is always 720 Y samples long. HRESET or Horizontal Reset Output (enabled when SCAPI or CAPI is selected, OM_SEL1:0 = 0, 1 or 1, 0) is a signal that indicates the beginning of a new line of video. In SCAPI/CAPI thi

41、s signal is one clock cycle wide and is output relative to CLKIN. It immediately follows the last active pixel of a line. The polarity is controlled via PHVR. Asynchronous FIFO Read Enable Signal. A logical high on this pin enables a read from the output of the FIFO. Output Enable Controls Pixel Por

42、t Outputs. A logic high will three-state P19-P0. ODD/EVEN Field Output Signal. An active state indicates that an even field is being digitized. The polarity of this signal is controlled by the PF bit. Video Analog Input Channels DV or Data Valid Output Signal. In SCAPI/CAPI mode, DV performs to func

43、tions, depending on whether SCAPI or CAPI is selected. It toggles high when the FIFO has reached the AFF margin set by the user, and remains high until the FIFO is empty. The alternative mode is where it can be used to control FIFO reads for bursting information out of the FIFO. In API mode DV indic

44、ates valid data in the FIFO, which includes both pixel information and control codes. The polarity of this pin is controlled via PDV. OE RESET Q4001: ADV7183 (Advanced Video Decoder with 10-Bit ADC and Component Input Support) TERMINAL DESCRIPTION (2/2) LRCK BICK SDTI Audio Data Interface MCLK PDN M

45、odulator AOUTL 8X Interpolator SCF LPF AOUTR VDD VSS VCOM De-emphasis Control P/S P Interface Clock Divider SMUTE/CSN ACKS/CCLK DIF0/CDTI Modulator 8X Interpolator DZFR DZFL SCF LPF ATT ATT 1 MCLK LRCK BICK SMUTE/CSN ACKS/CCLK DIF0/CDTI Top View 2 3 4 5 6 7 8 DZFL DZFR VSS VDD VCOM AOUTL AOUTR P/S 1

46、6 15 14 13 12 11 10 9 PDN SDTI No. Pin Name I/O Function 1 MCLK I Master Clock Input Pin An external TTL clock should be input on this pin. 2 BICK I Audio Serial Data Clock Pin 3 SDTI I Audio Serial Data Input Pin 4 LRCK I L/R Clock Pin 5 PDN I Power -Down Mode Pin When at “L”, the AK4384 is in the

47、power-down mode and is held in reset. The AK4384 should always be reset upon power-up. SMUTE I Soft Mute Pin in parallel mode “H”: Enable, “L”: Disable 6 CSN I Chip Select Pin in serial mode ACKS I Auto Setting Mode Pin in parallel mode “L”: Manual Setting Mode, “H”: Auto Setting Mode 7 CCLK I Contr

48、ol Data Clock Pin in serial mode DIF0 I Audio Data Interface Format Pin in parallel mode 8 CDTI I Control Data Input Pin in serial mode 9 P/S I Parallel/Serial Select Pin (Internal pull-up pin) “L”: Serial control mode, “H”: Parallel control mode 10 AOUTR O Rch Analog Output Pin 11 AOUTL O Lch Analog Output Pin 12 VCOM O Common Voltage Pin, VDD/2 Normally connected to VSS with a 0.1mF ceramic capacitor in parallel with a 10m F electrolytic cap. 13 VSS - Ground Pin 14 VDD - Power Supply Pin 15 DZFR O Rch