Alinco_DR-M03SX_M06TH_serv.pdf
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1、DR-M03SXService Manual DR-M06TH CONTENTS SPECIFICATIONSPARTS LAST 1) General2CPU Unit22 2) Transmitter2MAIN Unit2224 3) Receiver2VCO Unit24 CIRCUIT DESCRIPTIONSP Unit25 1) Receiver System3Mechanical Parts25 2) Transmitter System4Packing.25 3) PLL Circuit4DRM03 PA Unit25 4) Terminal Function of Micro
2、processor5 7 5) Terminal Connection of Microprocessor8ADJUSTMENT SEMICONDUCTOR DATA 1) Required Test Equipment.27 1) AK23419 2) Adjustment for DR-M06/032829 2) AN78L05M10 3) Adjustment Points30 3) AN8010M10 4) Adjustment Quick Reference30 4) BU4052BF10 5) LR40872111CIRCUIT DIAGRAM 6) M5218FP11 3) Ma
3、in Unit 32 7) M56760FP12 4) Main Unit33 8) MC7808CT13 5) CPU Unit34 9) RH5VA32AA-T113 10) RH5VA45AA-T113PC BOARD VIEW 11)M5773514 1) Main Unit Side A35 12) TK10487MTR15 2) Main Unit Side B36 13) AT24C02N-10SI-2.715 3) CPU Unit Side A.37 14) AT24C08-10SI-2.715 4) CPU Unit Side B37 15) uPC1241H16 5) V
4、CO Unit Side A38 16) Transistor, Diode and LED Outline Drawings 16 6) VCO Unit Side B38 17) LCD Connection17 EXPLODED VIEW 1) Bottom View18 2) LCD View18 3) Top, Front View 119 4) Top, Front View 220 5)DRM03 PA UNIT21 VERSION TABLE 21 ALINCO INCORPORATED TWIN 21 M.I.D. TOWER BUILDING 23F, 1-61, 2-CH
5、OME, SHIROMI CHUO-KU , OSAKA, 540-8580 JAPAN Tel (81)6-6946-8150 fax (81)6-6946-8175 e-mail: exportalinco.co.jp * SPECIFICATIONS GENERAL FrequencyDRM03SX28.00 - 29.700MHz DRM06TH50.00 - 54.00MHz Step5 , 10 , 12.5 , 15 , 20 , 25 KHz selectable Channel100 ModulationF3E (FM) Antenna impedance50 ohm unb
6、alanced Power supply13.8V DC +/- 10% CurrentTx high.approxl 3.0A (DRM03SX) Rx squelched.less than 600mA DimensionsDRM03SX140(W) x 40(H) x 115(D) DRM06TH140(W) x 40(H) x 155(D) WeightDRM03SXapprox 681gs DRM06THapprox 800gs Transmitter Power outputDRM03SXHigh : 10W Low: 1W DRM06THHigh : 20W Low: 2W Mo
7、dulationvariable reactance frequency modulation Max deviation+/- 5.0kHz Spurious-60dB or under below carrier MicrophoneElectret Condenser Microphone Operatin ModeSimplex/Semi-Duplex Offset0 to +/-15.995MHz freely programmable Receiver Receiver sysDouble-conversion superheterodyne I.F.10.7MHz and 455
8、kHz SensitivityDRM03SX0.16uV (-16dBu) 12dB SINAD DRM06DX0.25uV (-12dBu) 12dB SINAD Selectivity+/- 6kHz or under at -6dB +/- 15kHz or under at -60dB AF Output2.5W with 8ohm at 10%distortion 8ohm Page 2 CIRCUIT DESCRTPTION 1) Receiver System 1. Front EndThe signal from the antenna is passed through a
9、low-pass filter and input to the voltage step up circuit consisting Of L14. The signal from L14 is led to the gate of Q1. D19 is the diode limiter circuit against the excessive input power of more than 20dBm. Q1 is the FETwhich has two gates. The voltage of the gate 2 is set higher to get the high g
10、ain and sensitivity. The signal from Q1 is led to the triple band pass filter (L4, L5, L6), and gets the high image rejection ratio. 2. Mixer CircuitThe signal from the triple band pass filter is converted into the first IF signal of 17.2MHz. The receiving signal is led to the gate 1 of Q2, and the
11、first local oscillator signal is led to the gate 2 of Q2. To get the high conversion gain, the local oscillator signal voltage is set to about 1V. To reduce the high adjacent channel interference, the band width of the FL2 is set to 20kHz. The signal from FL2 is amplified by Q8, and input to FM IF s
12、ystem IC3 of TK10487. 3. IF CircuitThe TK10487 has the second local oscilltor circuit, mixer circuit, detector circuit, squelch circuit, and so on. Pin1 and 2 are the terminals of the crystal oscillator circuit. Pin2 (emitter) is connected to the ground via the resister R3 to prevent the oscillator
13、from decreasing the power at the low tempera- ture. Pin4 of IC3 is connected to FL1 directly because the matching resistor for ceramic filter is built-in. The quadrature circuit (pin10 of IC3) is con- nected to the ceramic resonator X2 for the temperature stability and good quality. The signal from
14、pin11 of IC3 is connected to the LPF. The detected AF signal, which has flat frequency characteristics, is led to the control unit and used as both squelch signal and tone squelch signal. De-emphasis circuit consists of R31, R32, C26 and C27. The LPF amplifier consisting of Q5 and Q6 is located far
15、away from the VR in the control unit, so it outputs the high voltage signal to prevent S/N from the deterioration. The squelch switch circuit consists of Q4 and Q16, and switches on/off at the point where there is no voltage to prevent from the switching noise. The S meter signal from pin12 of IC3 i
16、s led to the CPU in the control unit after adjusting the level at D20 and VR5. The S meter signal is thermal compensated by TH1 and stabilized. The noise amplifier consists of pin13 and 14, the built-in OP amplifier in IC3. The output signal of noise amplifier is amplified by Q14, rectified by D5, a
17、nd then led to the pin15 (hysteresis comparator input) of IC3. 4. AF CircuitIC4 is about 5W audio power amplifier IC. When the capacity of pin1 in C16 is increased more, the output incidental noise becomes smaller. The high- pitched tone becomes smaller at the same time, This radios capacity of C16
18、is determined considering the high-pitched tone. PAGE-3 2) Transmitter System 1. Modulation Circuit The microphone amplifier IC1 (IDC, LPF) consists of two operational amplifi- ers. The signal from the microphone is led to pre-emphasis circuit consisting of C36 and R47 and then to the limiter circui
19、t. The limiter circuit uses the saturation of the OP amplifier. The amplified signal is input to the low-pass filter IC1A. The output signal from the microphone amplifier is passed through variable resistors VR2 for modulatlon adjustment and input to the VCO unit. Sub tone deviation is determined by
20、 R24, R25 and VR2. The radio does not have the adjustment variable resistor for sub tone deviation. 2. TX Amp. Circuit The signal from VCO is ampriied by TX, RX wide band LO amplifier Q19. The signal from Q19 is passed through the transmission/reception selector, and amplified byQ20 and Q15. The PA
21、unit is driven at 200mW driving power. 3. PA Circuit IC5 is 20W(M06DX) powered amplifier module. The output power is controlled by the voltage of V1. The RF signal amplified 20W in PA is passed through D3 and three-stage transmission/reception low-pass filter, and input to the antenna connector. 4.
22、ALC Circuit(M06DX) The power detection circuit consisting of D17 and D18 rectifies the output signal voltage. The detected DC voltage is led to the VR1 (power adjust trimmer), and amplified by Q3, Q9 and Q13. Output power is controlled by voltage of V1 in IC5 and collector voltage of Q15. When the t
23、emperature goes up unusually, the power down circuit consisting of R101 and TH2 works to prevent the device from the destruction. 3)PLL Circuit(M06DX) The VCO unit is designed for the PLL circuit, putting the VCO on one side, and PLL circuit on the other side. Q301 in the VCO is grounded using the g
24、ate oscmator, and its frequency covers 50MHz to 54MHz without transmission/reception shift circuit. IC301 is pulse swallow system based PLL IC with the built-in prescaler, which synthesizes 150MHz-band signal. The loop filter consisting of Q302 and Q303 is the active type. PAGE-4 4) Terminal Functio
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