dj190_SM.pdf

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1、DJ-190 Service Manual CONTENTS +SPECIFICATIONS2 +CIRCUIT DESCRIPTION3 +SEMICONDUCTOR DATA9 +EXPLODED VIEW15 +PARTS LIST18 +ADJUSTMENT21 +PCBOARD VIEW26 +CIRCUIT DIAGRAM36 +BLOCK DIAGRAM43 ALINCO INCORPORATED TWIN 21 M.I.D. TOWER BUILDING 23F, 1-61, 2-CHOME, SHIROMI CHUO-KU , OSAKA, 540-8580 JAPAN Te

2、l (81)6-6946-8150 fax (81)6-6946-8175 e-mail: exportalinco.co.jp SPECIFICATIONS Frequency Coverage TX RX DJ-190T (u.s. Amateur version)144.000 147.995MHz 135.000 173.995MHz DJ-190E (European Amateur version)144.000 145.995MHz 144.000 145.995MHz DJ-190TA1 (commercial version VHFL) 135.000 155.000MHz

3、135.000 173.995MHz DJ-190TA2 (commercial version VHFH) 150.000 173.995MHz 135.000 173.995MHz Channel Step:5, 10, 12.5, 15, 20, 25, 30kHzsteps Memory Channels:40 Channels Antenna Impedance:50ohm unbalanced Frequency Stability:+/-5 ppm Microphone Input Impedance:2kohm nominal. Signal Type:F3E (FM) Off

4、set Range:0 99.995MHz Deviation:15kHz max. TX Output (supply voltage):1.5W (4.8V) / 3.5W (7.2V) / 5W (9.6 13.8V) RX Sensitivity:12dB SINAD better than - 16dBu RX Selectivity:-6dB/ +/- 12kHz I.F.:(1st) 21.25MHz / (2nd) 450kHz Power Supply Requirements:4.8 13.8V DC (4.8V DC standard) Current Consumpti

5、onTransmitting: Approx. 1.2 Amp. in High Power at 13.8V DC:Setting Receiving: Squelched Approx. 24mA (BS on) Operating Temperature:-10 +60*C, 14 140*F Dimensions:57(W) x 151(H) x 27(D) mm (with EBP-37N without projections)2 1/4(W) x 6(H) x 1 1/16(D) inches Weight:Approx. 300g Subaudible Tones (CTCSS

6、) :Encoder installed (50 tones) Page-2 CIRCUIT DESCRIPTION 1) Receiver SystemThe receiver system is a double superheterodyne system with a 21.7 MHz first IF and a450 kHz second IF. 1. Front EndThe received signal at any frequency in the 130.00- to 173.995-MHz range is passed through the low-pass fil

7、ter (L102, L103, L104, C113, C107, C116, and C114) and tuning circuit (L112 and D107), and amplified by the RF amplifier (Q107). The signal from Q107 is then passed through the tuning circuit (L109, L110, L111, and varicapsi D104, D105 and D106) and converted into 21.7 MHz by the mixer (Q106). The t

8、uning circuit, which consists of L112, L109, varicaps D107 and D104, Ll110 L111, varicaps D105 and D106, is controlled by the tracking voltage from the CPU so that it is optimized for the reception frequency. The local signal from the VCO is passed through the buffer (Q108), and supplied to the sour

9、ce of the mixer (Q106). The radio uses the lower side of the superheterodyne system. 2. IF CircuitThe mixer mixes the received signal with the local signal to obtain the sum of and difference between them. The crystal filter (XF101 , XF102) selects 21.7 MHz frequency from the results and eliminates

10、the signals of the unwanted frequencies. The first IF amplifier (Q105) then amplifies the signal of the selected frequency. 3. Demodulator CircuitAfter the signal is amplified by the first IF amplifier (Q105), it is input to pin 16 of the demodulator IC (IC104). The second local signal of 21.25 MHz

11、(shared with PLL IC reference oscillation), which is oscillated by the internal oscillation circuit in IC102 and crystal (X101), is input through pin 1 of IC104. Then, these two signals are mixed by the internal mixer in IC104 and the result is converted into the second IF signal with a frequency of

12、 450 kHz. The second IF signal is output from pin 3 of IC104to the ceramic filter (FL101), where the unwanted frequency band of that signal is eliminated, and the resulting signal is sent back to the IC104 through pins 5 and 7. The second IF signal input via pin 7 is demodulated by the internal limi

13、ter amplifier and quadrature detection circuit in IC104, and output as an audio signal through pin 9. 4. Audio CircuitThe audio signal from pin 9 of IC104 is compensated to the audio frequency characteristics in the de-emphasis circuit (R162, R161, C172, C173) and amplified by the AF amplifier (Q109

14、). The signal is then input to pin 2 of the electronic volume (IC103) for volume adjustment, and output from pin 1. The adjusted signal is sent to the audio power amplifier (1C105) through pin 2 to drive the speaker. 5. Squelch CircuitPart of the audio signal from pin 9 of IC104 is amplified by the

15、noise filter amplifier consisting of R176, R186, R177, C179, C183, C191, and C194, and the internal noise amplifier in IC104. The desired noise of the signal is output through pin 11 of IC104, to be further amplified by the noise amplifier (Q115). The amplified noise signal is rectified by voltage d

16、oublers D109 and input to pin 4 of CPU (IC5).Page-3 2) Transmitter SystemThe audio signal is converted to an electric signal in either the internal or 1. Modulator Circuitexternal microphone, and input to the microphone amplifier (IC6). IC6 consists of two operational amplifiers; one amplifier (pins

17、 1, 2, and 3) is composed of pre-emphasis and IDC circuits and the other (pins 5, 6, and 7) is composed of a splatter filter. The maximum frequency deviation is determined to its optimal value by switch circuits consisting of Q9 and Q10 and input to the cathode of the varicap of the VCO, to change t

18、he electric capacity in the oscillation circuit. This produces the frequency modulation. 2. Power AmplifierThe transmitted signal is oscillated by the VCO, amplified by the pre-drive Circuitamplifier (Q102) and drive amplifier (Q101), and input to the power module (IC101). The signal is then amplifi

19、ed by the power module (IC101) and led to the antenna switch (D101) and low-pass filter (L102, L103, L104, C113, C107, C116, and C114), where unwanted high harmonic waves are reduced as needed, and the resulting signal is supplied to the antenna. 3. APC CircuitPart of the transmission power from the

20、 low-pass filter is detected by D103, converted to DC, and then amplified by a differential amplifier. The output voltage controls the bias voltage from pin 2 of the power module (IC101) to maintain the transmission power constant. 3) PLL Synthesizer Circuit The dividing ratio is obtained by sending

21、 data from the CPU (IC5) to pin 2 1.PLLand sending clock pulses to pin 3 of the PLL IC (IC102). The oscillated signal from the VCO is amplified by the buffer (Q117) and input to pin 6 of IC102. Each programmable divider in IC102 divides the frequency of the input signal by N according to the frequen

22、cy data, to generate a comparison frequency of 5 or 6.25 kHz. 2. Reference FrequencyThe reference frequency appropriate for the channel steps is obtained by Circuitdividing the 21.25 MHz reference oscillation (X101) by 4250 or 3400, according to the data from the CPU (IC5). When the resulting freque

23、ncy is 5 kHz, channel stepsof5, 10, 15, 20, 25 and 30 kHz are used. When it is 6.25 kHz, the 12.5 kHz channel step is used. 3. Phase ComparatorThe PLL (IC102) uses the reference frequency, 5 or 6.25 kHz. The phase Circuitcomparator in the IC102 compares the phase of the frequency from the VCO with t

24、hat of the comparison frequency, 5 or 6.25 kHz, which is obtained by the internal divider in IC102 4. PLL Loop Fitter Circuit If a phase difference is found in the phase comparison between the reference frequency and VCO output frequency, the charge pump output (pin 8) of IC102 generates a pulse sig

25、nal, which is converted to DC voltage by the PLL loop filter and input to the varicap of the VCO unit for oscillation frequency control. Page-4 5. VCO CircuitA Colpitts oscillation circuit driven by Q301 directly oscillates the desired frequency. The frequency control voltage determined in the CPU (

26、IC5) and PLL circuit is input to the varicaps (D301 and D304). This changes the oscillation frequency, which is amplified by the VCO buffer (Q302) and output from the VCO unit. Note The oscillation frequency is determined by turning Q301 0N and OFF. Displayed frequenciesQ301 TX: 130.00 - 139.995 MHz

27、 OFF RX: 130.00 - 161.695 MHz TX: 140.00 - 173.995 MHz ON RX: 161.70 - 173.995 MHz 4) CPU and Peripheral CircuitsThe CPU turns ON the LCD via segment and common terminals with 1/3 1. LCD Display Circuitthe duty and 1/3 the bias, at the frame frequency is 85Hz. 2. Display Lamp CircuitWhen the LAMP ke

28、y is pressed, H is output from pin 45 of CPU (IC5) to the bases of Q1 then turn ON and the LEDs (D1, D3) Bight. 3. Reset and BackupWhen the power from the DC jack or external battery increases from 0 V to Circuits2.5 or more, H level reset signal is output from the reset IC (IC2) to pin 35 of the CP

29、U (IC5), causing the CPU to reset. The reset signal. however, waits at C6 and R98, and does not enter the CPU until the CPU clock (X1) has stabilized. When the external power drops to 3.2 V or below, the output signal from the backup IC (IC3), which has been input to pin 34 of the CPU, changes from

30、H to L level. The CPU will then be in the backup state. 4. S(Signal)Meter CircuitThe DC potential of pin 13 of IC104 is input to pin 3 of the CPU (IC5), converted from an analog to a digital signal, and displayed as the S-meter signal on the LCD. 5. Tone EncoderThe CPU (IC5) is equipped with an inte

31、rnal tone encoder. The tone signal (67.0 to 254.1 Hz) is output from pin 11 of the CPU to the varicap of the VCO for modulation. Page-5 5) CPU Terminal Functions: M38267M8L (XA413) Page-6 No.Pin NameSignalI/0LogicDescriptionNo.Pin NameSigna1I/0LogicDescription 1 C1C1-51 P15/SEG39F/KEYIActive lowFunc

32、tion key input 2 VL1VL1IA/DLCDpowersupply52 P14/SEG38K10I- 3 P67/AN7SMTIA/DS-meterinput53 P13/SEG37K11I- 4 P66/AN6SQLIA/DNoise level input for squelch54 P12/SEG36K12I- 5 P65/AN5BATIA/DLow battery detection input55 P11/SEG35K13l- 6 P64/AN4BP5IA/DBand plan556 P11/SEG34K14I-Key matrix input 7 P63/CLK22

33、/AN3BP4IBand plan457 P07/SEG33SFTO-VCO frequency range change 8 P62/CLK21/AN2ULIActivehighPLL unlock signal input58 P06/SEG32SDOActive lowSigna detection output 9 P61/SOUT2/AN1BP1,2IA/DBand plans 1 and 259 P05/SEG31AFCOActive high AF tone control output 10 P60/SIN2/ANOMOMIActivelowMonitor key input6

34、0 P04/SEG30DA4O- 11 P57/ADT/DA2CTOUTOD/ACTCSS tone output61 P03/SEG29DA3O- 12 P56/AD1DTOUTOD/A62 P02/SEG28DA2O-DA converter for electronic volume and output power 13 P55/CNTR1TSQDIActivelowCTCSS tone detection input63 P01/SEG27DA1O- 14 P54/CNTROBEPOPulseBeep tone output/Band plan 364 P00/SEG26DA0O-

35、15 P53/RTP1STB2I/O Active low/pulseCTCSS unit detection/Strobe signal to CTCSS unit65 P37/SEG25S25O- 16 P52/RTP0MUTEI/O ActivehighMicrophone mute66 P36/SEG24S24O- 17 P51/PWM1CLKOPulseSerial clock output for PLL, CTCSS67 P35/SEG23S23O- 18 P50/PWM0DATAOPulseSerial data output for PLL CTCSS68 P34/SEG22

36、S22O- 19 P47/SRDY1ACKI/0PulseBand plan 669 P33/SEG21S21O- 20 P46/SCLK1STB1OPulseStrobe for PLL IC70 P32/SEG20S20O- 21 P45/TXD1UTXOPulseUART data transmission output71 P31/SEG19S19O- 22 P44/RXD1URXIPulseUART data reception input72 P30/SEG18S18O- 23 P43/D/TOUTTBSTOPulseTone burst (1750Hz) output (Euro

37、pean version)73 SEG17S17O- 24 P42/INT2RE2IActivelow74 SEG16S16O- 25 P41/1NT1RE1IActivelowRotary encoder lnput75 SEG15S15O- 26 P40PTTIActivehighPTT input76 SEG14S14O- 27 P77DSWOActivelow77 SEG13S13O- 28 P76STDI/O ActivehighDeviation adjustment during transmission78 SEG12S12O-LCD segment signal 29 P75

38、DSDIPulseDeviation adjustment during transmission79 SEG11S11O- 30 P74T3COActive lowTX power ON/OFF output80 SEG10S10O- 31 P73P3COActive lowPLL power ON/OFF output81 SEG9S9O- 32 P72AFPOActivelowAFAMP power ON/OFF output82 SEG8S8O- 33 P71R3COActivelowRX power ON/OFF output83 SEG7S7O- 34 P70/INT0BUIAct

39、ivelowBackup signal detection input84 SEG6S6O- 35 RESETRSTIActivelowResetinput85 SEG5S5O- 36 XCINXCIN-86 SEG4S4O- 37 XCOUNTXCOUT-87 SEG3S3O- 38 XINXIN-Main clock input88 SEG2S2O- 39 XOUTXOUT-Main clock output89 SEG1S1O- 40 VSSGND-CPU ground90 SEG0SOO- 41 P27PSWIActivelowPower switch input91 VCCVDD-C

40、PU power terminal 42 P26SCLOPulseSerial clock for EEPROM92 VREFVREF-AD converter power supply 43 P25C3COActivehighC3 power ON/OFF output93 AVSSAVSS-AD converter ground 44 P24SDAOPulseSerial data for EEPROM94 COM3COM3- 45 P23LMPOActivehighLamp ON/OFF95 COM2COM2O-LCD COM2 output 46 P22T/KEYIActivelowT

41、one burst/LPTT input96 COM1COM1O-LCD COM1 output 47 P21K00I/O -Band plan BP7 input97 COM0COM0O-LCD COM0 output 48 P20K01O-Key matrix output98 VL3VL3I-LCD power supply 49 P17K02O-99 VL2VL2I-LCD power supply 50 P16K03O-100 C2I- Page-7Page-8 PARTS LISTCPU Unit/Tone Unit Ref.No.PartsNo. DescriptionParts

42、 NameVer.Ref.No. PartsNo.DescriptionParts NameVer.Ref.No.Parts No.DescriptionParts NameVer.Ref.No. PartsNo.DescriptionParts NameVer. CPU unitIC5XA0402ICM38267M8L-l01FPR35RK3058Chip RERJ3GSYJ473VR1001RK3046Chip RERJ3GSYJ472V C1CU3035 Chip CC1608JB1H102KTAIC6XA0209ICNJM2100M T1R36RK1018Chip RERJ8GEYJ1

43、01VR1002RK3048Chip RERJ3GSYJ682V C2CU3035 Chip CC1608JB1H102KTAJ1MACL2GGWire#30A11l-025-H1R37RK3038Chip RERJ3GSYJ102VR1003RK3062Chip RERJ3GSYJ104V C3CS0206 Chip TantalTMCMD0G107MTRJK1UJ0019ConnectorHSJ1493-01-010R38RK3041Chip RERJ3GSYJ182VR1005RK3058Chip RERJ3GSYJ473V C4CU3017 Chip CC1608CH1H330JT-A

44、SJK2UJ0022ConnectorHSJ1102-01-540R39RK3038Chip RERJ3GSYJ102VR1006RK3038Chip RERJ3GSYJ102V C5CU3017 Chip CC1608CH1H330JT-ASL1QC0003CoilMLF3216A1R0K-TR40RK3068Chip RERJ3GSyJ334VR1007RK3038Chip RERJ3GSYJ102V C6CS0208 Chip TantalTMCMA0J475MTRL2QC0003CoilMLF3216A1R0K-TR41RK3065Chip RERJ3GSYJ184VR1008RK30

45、01Chip RERJ3GSY0R00V C7CU3035 Chip CC1608JB1H102KTAL4QC0003CoilMLF3216A1R0K-TR42RK3061Chip RERJ3GSYJ823VR1009RK3038Chip RERJ3GSYJ102V C8CU3035 Chip CC1608JB1H102KTAL5QC0003CoilMLF3216A1R0K-TR43RK3058Chip RERJ3GSYJ473VR1010RK3058Chip RERJ3GSYJ473V C9CS0206 Chip TantalTMCMD0G107MTRL6QC0442CoilMLF1608A

46、1R0K-TR44RK3054Chip RERJ3GSYJ223VR1011RK3038Chip RERJ3GSYJ102V C10CS0373 Chip TantalTMCMD1C476MTRL7QC0442CoilMLF1608A1R0K-TR47RK3052Chip RERJ3GSYJ153VR1012RK3038Chip RERJ3GSYJ102V C11CS0206 Chip TantalTMCMD0G107MTRL8QC0442CoilMLF1608A1R0K-TR48RK3062Chip RERJ3GSYJ104VR1013RK3001Chip RERJ3GSY0R00V C12

47、CU3059 Chip CC1608JF1E104ZTAL9QC0442CoilMLF1608A1R0K-TR49RK3048Chip RERJ3GSYJ682VX1XQ0074CrystalSMD-49 4.19MHZ C16CS0057 Chip TantalTMCSA0J225MTRL10QC0442CoilMLF1608A1R0K-TR52RK3041Chip RERJ3GSYJ182VUP0294BP.C.BCPU PCB C18CS0049 Chip TantalTMCSA1C105MTRLCD1EL0030LCDLCD XH618R53RK3046Chip RERJ3GSYJ47

48、2VTL0016Spread Sheet DJG5 C19CU3021 Chip CC1608CH1H680JTAMIC1EY0012MicEN-123TR54RK3062Chip RERJ3GSYJ104VFG0186ZJack Cap C20CU3035 Chip CC1608JB1H102KTAQ1XU0064TransistorUN5210 TXR55RK3050Chip RERJ3GSYJ103VDG0021LCD Light DJG5 C21CU3056 Chip CC1608JF1E473ZTAQ3XU0040TransistorUN211H TXR56RK3066Chip RE

49、RJ3GSYJ224yFG0182LCD Rubber(A)DJG5 C22CU3035 Chip CC1608JB1H102KTAQ5XU0040TransistorUN211H TXR57RK3039Chip RERJ3GSYJ122VFG0183LCD Rubber(B)DJG5 C23CU3035 Chip CC1608JB1H102KTAQ7XU0014TransistorDTC144EKA T146R58RK3069Chip RERJ3GSyJ394V C24CU3051 Chip CC1608JB1E223KTAQ9XU0064TransistorUN5210 TXR59RK3051Chip RERJ3GSYJ123VST0053YLCD Holder DJ190 C25CU3051 Chip CC1608JB1E223KTAQ10XU0064TransistorUN5210 TXR60RK3038Chip RERJ3GSYJ102VFG0234Mic Holdcr C26CU3027 Chip CC1608CH1H221JTAQ11XT0095Transistor2SC4081 T106RR61RK3054C