djs45CQ_SM.pdf
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1、 DJ S45CQ/ T / E Service Manual CONTENTS S SPECIFICATIONS General Transmitter. Receiver. CIRCUIT DESCRIPTION 1) Reception 2) Transmission. 3) CPU SEMICONDUCTOR DATA 1) NJM2070M (XA0210) 2) TA31136FN (XA0404). 3) BA4510FV (XA0537). 4) M64082AGP (XA0543). 5) uPC2771TB (XA0953). 6) uPC2757TB (XA0953).
2、7) BU4818FVE (XA1095). 8) BR24L16FVM (XA1096). 9) XC6209F352MR (XA1097) 10) XC6367A453MR (XA1098). 11) LM2904PWR (XA1103). 12) Transistor, Diode and LED Outline Drawings 13) LCD Connection (EL0060). EXPLODED VIEW 1) Front View. 2) Rear View. 3) Bottom View. 2 2 2 3-4 4 5-7 8 8 8 9 9 9 10 10 11 11 11
3、 12 13 14 15 16 PARTS LIST CPU Unit. MAIN Unit. Mechanical Unit. Packing Unit. ADJUSTMENT 1) How to enter the adjustment mode. 2) How to select the adjustment item. 3) How to change the Squelch. 4) How to transmit the Tone Burst. 5) Standard Measuring Condition. Adjustment Points Adjustment Specific
4、ation. PC BOARD VIEW. SCHEMATIC DIAGRAM. BLOCK DIAGRAM. 17-18 19-20 21 21 22 22 22 22 22 23 24-25 26-29 31-32 33 ALINCO, INC. 2 SPECIFICATIONS General Type DJ-S45CQS/CQL DJ-S45T DJ-S45E Transmitter Range (MHz) PMR:446.00625-446.09375 LPD:433.06000-434.78000 420.000-449.995 430.000-439.995 Receiving
5、Range (MHz) PMR:446.00625-446.09375 LPD:433.06000-434.78000 420.000-473.995 430.000-439.995 Modulation F3E Operating Temperature -1060 (+14F+140F) Frequency Stability -7+3ppm Antenna Impedance 50 ohm Supply Voltage 3.0-6.0VDC (External) Ground Method Negative ground Transmit PMR:Approx. 0.45A LPD:Ap
6、prox. 0.20A Hi-Power:Approx. 1.00A Lo-Power:Approx. 0.45A Receive Approx. 60mA Current (DC6.0V) Battery Save Approx. 13mA Transmitter Type DJ-S45CQS/CQL DJ-S45T DJ-S45E Output Power PMR:Approx. 500mW LPD:Approx. 10mW Hi-Power:Approx. 2.0W Lo-Power:Approx. 0.5W Modulation System Variable Reactance Ma
7、x. Deviation +/-2.5kHz +/-5kHz Spurious Emission 250nW or less -60dB or less Frequency Stability Approx. 2k ohm Receiver Type DJ-S45CQS/CQL DJ-S45T DJ-S45E Receiver circuit Double Conversion Super-heterodyne Impedance Frequency 1st:21.7MHz / 2nd:450kHz Sensitivity -15dBu or less (12dB SINAD) Audio O
8、utput Power 180mW or over (MAX) / 150mW or over (10% Distortion 8 ohm) Spurious Response 2nW or less 60dB or over ! NOTE: All specifications are subject to change without notice or obligation. 3 CIRCUIT DESCRIPTION 1) Reception 1. RX Method FM: Double Super Heterodyne Method Double Super Heterodyne
9、Method 1st IF: FM: 21.7 MHz 2nd IF: FM: 450 kHz 2. Front End The signal input from antenna passes through the low pass filter, then it is amplified at RF amplifier Q110 and Q111. The amplified signal is led to band pass filter, then input to the mixer IC103. 3. Mixer The input signal to the mixer IC
10、103 and the 1st local signal are added or subtracted at mixer IC103, and the crystal filter FL101 selects the signal of 21.7 MHz, then it is amplified at the 1st IF amplifier Q112 after the adjacent signal is eliminated. 4. IF The signal amplified at the 1st IF amplifier Q112 is supplied to pin 16 o
11、f IC104 for demodulation. Also the signal of 21.25MHz from the reference buffer output of IC102, then it is led to pin 1 of IC104. 2 input signals are mixed in the mixer circuit inside IC104 and converted into the 2nd IF signal of 450kHz.The converted 2nd IF signal is output from pin 3 of IC104. The
12、 output signal from pin 3 of IC104 is led to pin 5 of IC104 after eliminating the adjacent channel signal at the ceramic filter FL102. The input 2nd IF signal to pin 5 of IC104 is demodulated at the limiter amplifier and quadrature detector circuits inside of IC104, then output from pin 9 of IC104 a
13、s an AF signal. 5. Squelch The AF signal got from pin 9 of IC104 is fed to pin 8 of IC7. The input signal is output from pin 14 of IC104 passing through the noise filter amplifier and rectifier circuits inside of IC104. The rectified signal is added to the A/D port of the microcomputer IC2. Judging
14、the signal, the microcomputer controls ON/OFF of the audio output. 6. Audio The volume of output audio signal is adjusted at the volume VR1 via the AF amplifier Q2. The signal is input to pin 2 of audio power amplifier IC1 and output from pin 6 to drive a speaker, etc. 7. VCO The VCO in UHF band con
15、sists of the Colpitts oscillator. D103, D105, L114 and L115 determine the oscillating frequency, and the signal is oscillated at the transistor Q106. The oscillated signal is supplied to pin 6 of PLL-IC102 passing through the buffer amplifier Q101 and Q107. 4 8. PLL PLL-IC102 is used to control the
16、oscillating frequency of the VCO. IC102 is controlled by the serial control signal sent from the microprocessor IC2. The 21.25MHz reference frequency of IC102 oscillates the crystal oscillator X101 at the inside circuit. IC102 compares the frequency gained by dividing the signal added to pin 14 of I
17、C2 by the control signal from IC2 with the frequency gained by dividing the reference frequency of 21.25MHz inside IC102. When the phase difference is found as a result of phase comparison, the pulse signal is output from the charge pump output of pin 16 of IC102, then the signal is converted into t
18、he DC voltage at the passive filter and added to the cathode side of the VCO vari-cap D103 and D105 to make the phases equal. In result the stabilized oscillation can be done at the desired frequency. 2) Transmission 1. Microphone Amplifier The microphone amplifier IC4 has 2 operational amplifiers.
19、The voice is converted into the electric signal through the microphone, then supplied to IC4. The input signal is amplified and pre-emphasized to be output. The signal output from microphone amplifier is adjusted the maximum frequency deviation at VR102. The adjusted signal is added to the cathode o
20、f the VCO vari-cap D104 for deviation to change the capacity of the oscillation circuit resulting the FM deviation. 2. Power Amplifier The oscillated signal of the VCO is supplied to the power amplifier Q104, passing through buffer amplifier Q107, pre-driver amplifier IC101, driver amplifier Q105. T
21、he power-amplified signal is supplied to the antenna through the duplexer after the harmonics are attenuated enough. 5 3) CPU M38227M8A (XA1125/XA1141) Terminal Connection (TOP VIEW) 6 No. Terminal Signal I/O Description 1 P67(AN7) BP1 A/DBand plan 1 2 P66(AN6) BP2 A/DBand plan 2 3 P65(AN5) TIN A/DC
22、TCSS Tone input 4 P64(AN4) SQL A/DNoise level input for squelch 5 P63(AN3) SMT A/DS-meter input 6 P62(AN2) BP3 A/DBand plan 3 7 P61(AN1) BCHK A/DBattery detection input 8 P60(AN0) EXT O Signal detection output 9 P57(ADT) MUTE O Microphone mute 10 P56(Tout) BEEP O Beep tone output 11 P55(CNTR1) PT3 I
23、 PTT input 12 P54(CNTR0) TBST O Tone burst output 13 P53(RTP1) AFPC O Audio amp power supply ON/OFF control 14 P52(RTP0) AFS O AF mute 15 P51(INT3) FUNC I FUNC key input 16 P50(INT2) DOWN I DOWN key input 17 P47(SRDY) V/M I V/M key input 18 P46(Sclk) UP I UP key input 19 P45(TxD) TXD O Clone data tr
24、ansmission output 20 P44(RxD) RXD I Clone data reception input 21 P43(INT1) TSWC O TSQ power supply ON/OFF control 22 P42(INT0) BU I Back up signal detection input 23 P41() MONI I MONI key input 24 P40 NC 25 RESET RST I Reset input 26 P71(Xcin) SCL I Serial clock output for EEPROM 27 P70(Xcout) SDA
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