Anritsu HFE0902_Pengelly 电路图.pdf

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1、26High Frequency Electronics High Frequency Design RF POWER AMPLIFIERS Improving the Linearity and Efficiency of RF Power Amplifiers Raymond S. Pengelly Cree Microwave A growing number of semiconductor technologies are being applied to RF power transistor applica- tions. These technologies include S

2、i LDMOS FET, SiGe HBT, InGaP HBT, GaAs MESFET, AlGaAs pHEMT,SiC MESFET and AlGaN/GaN HEMT. The dependencies of linearity and efficiency of such technologies are often common, such as transconductance derivatives, capacitance variations, break- down effects and parasitic resistances. This article ove

3、rviews the work that has been achieved to date to maximize linearity and efficiency in the most promising technologies, as related specifically to infrastructure appli- cations.The article also addresses the increas- ing number of device and circuit level tech- niques that are being used to enhance

4、these two important parameters as required for IM3, ACPR and ACLR suppression in 3G sys- tems such as W-CDMA/UMTS. This article focuses on high power (that is greater than 10 watt) RF transistor technolo- gies where digital modulation techniques are demanding higher and higher peak-to-average ratios

5、 (PARs) and thus higher peak powers. Peak and average DC-to-RF efficiencies have become critical parameters, and much atten- tion is being focused in decreasing multi-carri- er intermodulation distortion, adjacent chan- nel power ratios (ACPRs) and adjacent chan- nel leakage ratios (ACLRs). Unfortun

6、ately, improving transistor linearity often leads to decreased efficiency which directly affects overall system efficiency, heat removal, size and cost. Competing Technologies The generation of solid state RF power has been in existence since the late 1960s when silicon bipolar transistors were intr

7、oduced by such companies as TRW and RCA (ref. 1). Today there are a range of technologies avail- able, including silicon bipolar, silicon LDMOS FET,GaAs MESFET,GaAs pHEMT, AlGaAs/InGaAs HFET, GaAs, InP, InGaP and SiGe HBT as well as wide bandgap transistors such as SiC MESFET and AlGaN/GaN This arti

8、cle describes improvements in device technology and design techniques that will enable power amplifiers with higher efficiency and better linearity performance at higher frequencies TechnologyPrice/WattPowerSupplyLinearityFrequencyPAE DensityVoltage Si BJTLow CostMedium26 VPoor2 GHz Low SiGe BJTLow

9、CostMedium2 GHzHigh Si LDMOSLow CostLow26 VVery Good2 GHzMedium GaAs pHEMTMediumMedium8 V to 12 VVery Good2 GHzHigh GaAs HBTCompetitiveHigh8 V to 26 VGood2 GHzHigh SiC MESFETCompetitiveVery High48 VGood4 GHzMedium GaN HEMTN/AVery High48 VPromising12 GHzHigh Table 1 Overview of competing solid-state

10、RF power transistor technologies. From September 2002 High Frequency Electronics Copyright 2002, Summit Technical Media, LLC RadioFans.CN 收音机爱 好者资料库 28High Frequency Electronics High Frequency Design RF POWER AMPLIFIERS HEMT. Table 1 presents a brief com- parative overview of some of these technolog

11、ies. Figure 1 shows the trends in discrete transistor output powers and efficiencies as a function of frequency for HEMTs and HBTs. Single die peak powers for Si LDMOS FETs have reached greater than 60 watts at 2 GHz. Of particular interest today are wide bandgap transistors such as sil- icon carbid

12、e (SiC) MESFETs and gal- lium nitride (GaN) HEMTs. Such transistors exhibit very high RF power densities (watts per mm of gate width) compared to any other technologies (by a factor of 10 over GaAs MESFET for example) (ref. 3 and 4). Wide band-gap transistors fabri- cated from 4H-SiC and AlGaN/GaN o

13、ffer superior RF performance, par- ticularly at elevated temperatures, compared to comparable components fabricated from GaAs or Si. RF out- put powers on the order of 4 to 7 W/mm and 10-12 W/mm are achiev- able from SiC MESFETs and AlGaN/GaN HFETs respectively. Achievement of higher power den- siti

14、es is a priority for RF power tech- nologies as it reduces size, which is important in both fixed and mobile platforms. It also provides higher working impedances,which are important for wider bandwidth oper- ation, simpler circuits and easier manufacture. Figure 2 shows a comparison of the input an

15、d output impedances of a 20 mm GaN HEMT delivering greater than 100 watts CW peak power with a commercially available Si LDMOS FET of similar power capability. Clearly, the GaN HEMT has much more convenient impedance levels which can also result in easier packaging whereby no internal pre-matching i

16、s needed (Figure 3). The higher gain of the GaN device requires lower drive drive. Initial linearity measurements show similar performance for the two device technologies. Both SiC MESFETs and GaN HEMTs show promising efficiencies and linearities. For example, Figure 4 shows the peak efficiencies of

17、 a GaN HEMT as a function of drain-to- source voltage over a range of 10 to 40 volts. Note that the drain efficien- cy remains almost constant at greater than 60 percent over the complete voltage range which enables efficiencies to be optimized at reasonable back-off powers (e.g. up to 10 dB). Figur

18、e 5 shows an example of the promising linearity that can be obtained from such wide bandgap transistors.The figure shows a comparison between a 1.2 mm gate width GaAs pHEMT and a 1 mm gate width AlGaN HEMT. Although these transistors have comparable gate widths the AlGaN HEMT provides 10 dBm more ou

19、t- put power with improved third order intermodulation distortion. Figure 1 Discrete device output powers and efficiencies versus frequen- cy (after Nguyen and Micovic, ref. 2). Modeled GaNMotorola 20 mm HEMTMRF18090B Pout100 Watts100 Watts Zin25 +j49 2 +j8 Zout3.8 +j0.8 1.3+j2.2 Gain25 dB13 dB Simi

20、lar packages assumedmatching capacitor included for GaN input No output matching for GaN device Vds= 35 V GaN, 26 V for LDMOS Figure 2 High power GaN HEMT in a cel- lular base station application. Figure 3 Example of a packaged 100 watt GaN HEMT (ref. 20). Pout is 100 W and peak drain efficiency is

21、54 percent. RadioFans.CN 收音机爱 好者资料库 30High Frequency Electronics High Frequency Design RF POWER AMPLIFIERS Ways of improving Efficiency and Linearity There are basically three ways to improve the efficiency and linearity of RF power transistors: Intrinsic technology improvements Device/circuit level

22、 improvements Circuit/sub-system level improve- ments This article concentrates on the first two methods and does not include sub-system linearization techniques such as feedforward and pre-distortion.These are covered well by authors such as Cripps (ref. 5) and Pothercary (ref. 6). There are many c

23、ommon factors in the determination of linearity in various RF power transistor tech- nologies. These include changing impedance levels (both input and out- put) as a function of RF signal level; changing transconductance and its derivatives as a function of DC bias and RF signal levels (which is a p

24、ri- mary determinant of multi-tone intermodulation characteristics); changing capacitances and their derivatives as a function of DC bias and RF signal levels; breakdown and substrate conduction effects; and, of course, class of operation commonly Class A through E. There are a number of ways in whi

25、ch basic transistor linearity can be improved: By increasing the transconduc- tance or beta of the device and its rate of increase from threshold. Examples of this are the linearity improvements provided by pHEMTs in comparison to MESFETs as well as the ability to engineer channel and drain improvem

26、ents in HBTs and LDMOS FETs By increasing working voltage, which tends to decrease the capaci- tance of the transistor per watt of RF power By decreasing odd order transcon- ductance derivatives By reducing capacitance variations with voltage, e.g. CBC in HBTs By increasing breakdown voltage, for ex

27、ample, using a double gate recess versus a single gate recess in a MESFET By reducing surface trapped charge A common expression for the rela- tionship between drain current and gate voltage in a FET is given by Equation (1), where IDis the large- signal drain current and VGand iD are incremental ga

28、te voltage and drain current around the quiescent bias point ID(VG, 0) respectively. In a two-tone test with frequencies 1and 2, third order intermodulation prod- ucts with frequencies of 21 2and 22 1are generated by the third term in Equation (1). The third term in Equation (1) is directly related

29、to the rate of change of transconductance with applied gate voltage. Hence, if the field-effect transistor can be engineered with as constant a change in transconduc- tance as possible as it comes out of threshold and before it enters satura- tion then the linearity of the device will be improved. A

30、n example of the optimization of the epitaxial layer structure and gate recess that provides high and steep transconductance change close to threshold is shown in Figure 6 from work reported by Takenaka et al in 2000 (ref. 7). In this example, third order intermodulation distortion was decreased by

31、greater than 10 dBc over a wide range of output power levels. Transistor efficiency can be Figure 4 Characterization of AlGaN/GaN HEMTs using a fixed load at varying supply voltages (ref. 21). Figure 5 Intermodulation perfor- mance of AlGaN HEMT compared to GaAs pHEMT of comparable gate periphery. i

32、D= dID/dVG|V=VG,0VG+ d2ID/2dVG2|V=VG,0VG2+ d3ID/6dVG3|V=VG,0 VG3 = g1VG+ g2VG2+ g3VG3 Equation 1 The relationship between drain current and gate voltage. RadioFans.CN 收音机爱 好者资料库 September 200231 improved in a number of ways: By reducing parasitic resistances such as RDand RDSONin LDMOS FETs By optim

33、izing die layout By reducing thermal resistance which decreases device self heating By optimizing various properties such as substrate materials and thicknesses Figure 7 shows an example of the effect that RDSONcan have on the output power and power added effi- ciency of a 60 watt hybrid amplifier c

34、onsisting of two, 30 watt LDMOS FETs operating between quadrature hybrids. RDSONis the total resistance of the device when it is operating (as a “switch”) at the extreme of its load- line (between drain and source but excluding parasitic drain resistance). In this example RDSONis changed from 0.13 t

35、o 0.26 ohms resulting in 9 percent degradation in peak efficien- cy and over 1.5 dBm reduction in out- put power. At the device/circuit level there are a number of ways to improve both efficiency and linearity. By employing harmonic termina- tions (refs. 8, 9); By employing Doherty amplifier configu

36、rations (refs. 10, 11, 12) By employing derivative superposi- tion approaches and transconduc- tance compensation (refs. 13, 14, 15, 16 and 17) By employing novel Class AB-C approaches (ref. 18) By employing dynamic power sup- ply approaches (ref. 19) This article concentrates on one aspect of devic

37、e/circuit level improve- mentso-called derivative superposi- tion. Webster et al (ref. 13) originally described this concept.In the approach a number of transistors are connected in parallel such that the negative d3ID/dVG3(see Equation 1) of one transistor cancels the positive d3ID/dVG3of another t

38、ransistor which is biased at a different gate drive.The positive and negative characteristics of d3ID/dVG3are not symmetrical so “flat compensated IM3 regions” can be extended by using more transistors with different gate widths. Figure 8(a) shows a circuit dia- gram of such a scheme where 5 watt LD

39、MOS FET die have been used in a mini-hybrid approach. In this case each FET had the same gate width but the gate voltage applied to each FET was different resulting in 7 to 10 dBc improvement in IM3 over the 8 to 13 dB back-off range (Figure 8(b). By using different gate width devices and increasing

40、 the number of FETs, IM3 improvements can be increased. Figure 9 shows an exam- ple of four LDMOS FETs being used where the total output power at 1 dB compression is 48 dBm. Figure 6 Optimization of transconductance and reduction in transcon- ductance derivative. Figure 7 Output Power and Power- Add

41、ed Efficiency as a function of RDSON for a Si LDMOS FET power amplifier operating at 2.14 GHz. Figure 8(a) Circuit diagram of Transconductance Derivative Superposition applied to a 15 watt LDMOS FET power amplifier, with a hybrid circuit implementation (right). 32High Frequency Electronics High Freq

42、uency Design RF POWER AMPLIFIERS Table 2 shows a comparison of some of the device/circuit level lin- earization/efficiency improvement techniques that can be applied to a range of transistor technologies. The emphasis today is to develop methods that can replace feedforward and other techniques to r

43、educe complexi- ty and cost. The use of a limited combination of approaches such as derivative superposition to improve linearity and Doherty amplification to improve efficiency can provide solutions which can then be incorporated into sub-system approaches such as pre- distortion, dynamic power sup

44、plies etc. The challenge is to implement these new schemes in a cost-effective manner. Acknowledgement The author would like to acknowl- edge the contributions of all the team members at Cree, Cree Microwave and Cree Lighting in advancing the state-of-the-art of Si LDMOS FET, SiC MESFET and GaN HEMT

45、 tran- sistors and circuits. About the Author Ray Pengelly is Vice President and Chief Technical Officer of Cree Microwave. He can be reached by e- mail at: ray_ For additional product informa- tion, please contact Sheryle Henson, Marketing Manager, Cree Micro- wave; tel: 408-962-7783 or e-mail: she

46、ryle_ References 1. Sterzer, F. “Progress in Solid-State Microwave Power Sources,” IEEE Trans. On Microwave Theory and Techniques, Vol. MTT-13, No. 6, Nov. 1965, pp.768-772. 2. Nguyen, C. et al, “The state-of-the- Figure 8(b) Improvement in IM3 for a 3 FET transcon- ductance derivative superposition

47、 circuit. Figure 9 Example of IM3 improvement for a 4 FET trans- conductance derivative superposition arrangement. Technique Device Selection, e.g. HEMT versus LDMOS-FET (see Table 1) Device Optimization Derivative Superposition Harmonic Terminations Doherty Dynamic Power Supplies Pros Intrinsic sol

48、ution offering batch manufacturing Intrinsic solution offering batch manufacturing Relatively simple; Discrete or IC solution Relatively simple Well proven Relatively complex Cons Process maturity Process maturity Requires reproducible threshold voltage Limited improvements Can be complex for higher

49、 order Doherty Needs high operating voltage for optimum performance. Wide bandgap is a good candidate Table 2 Comparison of various device/circuit level techniques to improve transistor efficiency and linearity. 34High Frequency Electronics High Frequency Design RF POWER AMPLIFIERS art of GaAs and InP Power Devices and Amplifiers,” IEEE Transactions on Electron Devices, Vol. 48, No. 3, March 2001, pp.472-478. 3. Jenkins, T. et al, “Linearity of high Al-content AlGaN/GaN HEMTs,” Device Research Conference, 2001 Air Force Res. Lab. Wright-Patterso