Crown_XS-500_Service_Manual电路图.pdf

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1、 Crown International, Inc. 1 Xs500 Circuit Description Introduction These notes are intended to assist maintenance and service of the Xs family of amplifiers. It is recommended that reference be made to the relevant schematic diagrams while reading this document. The component references detailed in

2、 the text are for channel 1. This document will refer to channel 1 references only. Operation of channel 2 is identical except where explicitly noted. Voltage values mentioned in the text are test voltages that may be used for diagnostic purposes, although attention is drawn to the surrounding text

3、that explains circuit operation and may qualify such measurements. Switching Power Supply AC mains is inserted via the snap-in IEC connecter on the chassis. Earth is connected directly to chassis from the body of the IEC connector. Live passes through the circuit breaker. Live and neutral pass throu

4、gh an EMI filter consisting of C15 and C18 (X2 rated), L1, L2 and C16, C17, C19, C20 (Y2 rated). C1 and C4 act as conducted EMI suppression caps. Live passes through the soft-start system, TH1 and RLY1. RLY1 shorts out TH1 when the power supply is running. Live and neutral then pass to bridge rectif

5、ier BR2, which for the 230V setting (jumpers set to SP1-SP3 and SP2-SP5) full-wave rectifies mains, smoothing performed by reservoir capacitors C22, C23, C24, C25, C26, C27. In the 120V setting (jumpers set to SP1-SP2 and SP4-SP5), this power supply is configured as a voltage-doubler. Thus, the High

6、 Tension (+HT) DC generated is approximately equal for 230V mains and 120V mains. This will result in about 320VDC between LIVE GND and +HT. LIVE GND is named as such because it is not isolated from mains but it is the reference point for the power supply. If you need to stick a scope probe around t

7、he primary side with the unit plugged in you must connect mains via an isolation transformer. Without this, at best you will only trip your RCD breaker, at worst you or your scope may not live to regret it. Do not forget that 320VDC is still pretty shocking whether it is isolated or not. R28 and R29

8、 ensure proper voltage sharing of the reservoir caps. Power for the switching controller circuit is provided from two sources. At start-up, the power comes from R30, R31, ZD1, D1 and C33. C33 is charged up to about 47V through D1 from zener regulator R30, R31 and ZD1. The command to start the power

9、supply comes from the PIC (+5V for off, 0V to switch on) via R32. The LED in OPT1 is turned on which turns the transistor on, shorting out pins 5 and 4. While the transformer windings are cooler than 120C the thermal cutout (between pins 21 and 22 of T900) will be a short circuit. R33 will be connec

10、ted to the top of C33 and will form a zener regulator with ZD2. The output of this zener regulator is buffered by TR1, which then powers the controller for long enough until the second source of power is ready. The second source of power comes from the transformer on pins 16 and 17. This secondary i

11、s voltage-doubled by C47, D6, D5 and C46 and produces about 48VDC on VAUX. This is connected via D2 to the anode of C33 so the controller circuit can continue running. VAUX is used to directly power RLY1 to short TH1 out while the power supply is running. The circuit comprising R34, R35, ZD3, R36, T

12、R2, and R37 shut down the power supply when the voltage on C33 falls below 32V. While the voltage on C33 is greater than 32V, TR2 is switched on and pulls pin 10 of IC6 down to 0V, which enables IC6. When the voltage on C33 falls below 32V, TR2 switches off and pin 10 of IC6 is pulled up to 20V thro

13、ugh R37, disabling IC6. The switching controller circuit is based around IC6, a SG3525 PWM controller. The switching frequency is set by R39 and C39 to about 85kHz. R38 controls the dead time period, setting it to between 500ns and 1s. Outputs appear at pins 11 and 14 of IC6. These two outputs are c

14、omplementary; when one is high (20V), the other is low (0V). Due to the dead time control, neither outputs are high at the same time but both are low for the dead time period. These outputs are fed through R40 and R41 to high current buffers RadioFans.CN 收音机爱 好者资料库 Crown International, Inc. 2 TR3 an

15、d TR4 as well as TR5 and TR6. The buffered outputs push-pull drive the primary of the Pulse transformer TX6. R42 is a damping resistor used to minimize ringing caused by imperfections in TX6. The transformer has two secondaries, each driving one IGBT in anti-phase. The turns ratio is 1.5:1 (primary:

16、secondary) and due to the push-pull connection of the primary, the output of TX6 swings positive to about 15V to turn the IGBT on, falls to 0V switching the IGBT off during dead time and falls to about 15V while the other IGBT is switched on. IGBTs TR7 and TR8 form a half-bridge driver for T900. Snu

17、bbers R45, C43, R46, C44 damp any ringing that may occur. The drive for the transformer from the IGBTs is an 85kHz square wave almost hitting +HT at the top of its travel and bottoming out slightly above LIVE GND. This drive is connected to the resonant inductor L3 and caps C29, C30, C31, C32 which

18、in turn is connected to the primary of T900 pins 1 and 2. The other end of the primary at pins 19 and 20 connects between R28 and R29. There are two main secondaries: 1. Pins 13 and 14 are the low voltage center tapped secondary winding. Output of this is full-wave rectified by D8, D9, D10, D11 and

19、smoothed by C50 and C51. Further filtering is provided by L5, L6, and C52, C53 before passing to +15V and 15V regulators IC7 and IC8 respectively. The +15V and 15V outputs are decoupled by C54 and C55 close to the regulators to ensure stability. D7 half-wave rectifies the secondary output. This is l

20、ightly smoothed by C49 and loaded by R51. This is passed via ZD5, R597, R590 and C546 to the PIC. While the power supply is running, this circuit will produce a digital high at the PIC input. If the power supply stops for any reason, the small value of C49 means that the PIC will receive a digital l

21、ow well before any of the power supplies have drooped significantly, allowing the PIC time to prevent dips. 2. Pins 9, 10 are the main power center-tapped secondary. This is full-wave rectified by D18, D19, D16, D17 and smoothed by C60, C61 to produce +HT, -HT so that HT = 100V. R53 is the negative

22、rail bleeder. Amplifier (Refer to Channel 1) The amplifier consists of a Class A driver and a Class AB power output stage. The driver provides voltage gain only; the output stage provides current gain only. Audio signal enters the amplifier through DC blocking capacitor C124, then low-pass filter R1

23、11 and C101 and onto the base of TR103. R110 provides a low source impedance in case the front panel board is disconnected. R112 provides a DC path to ground for the base current of TR103. The output of the amplifier is fed back through potential divider R117 and R115 to the base of TR104. C102 deco

24、uples the feedback signal at DC so that DC offsets generated by TR103 and TR104 are not amplified at the output. D104 and D105 protect C102 in the event of a DC fault. TR103 and TR104 form a Long-Tailed Pair to amplify the difference between the input signal and the feedback signal. The gain of the

25、LTP is reduced by R108 and R109 to help prevent oscillations and de-sensitize the performance of the input stage to parametric variations of the two transistors. A bias current of about 2.8mA for this LTP is provided through R107 from current source TR102, R106, D100, D101, and R105. In the quiescen

26、t state half of this current is driven through each of TR103 and TR104. The collector current of TR103 and TR104 are loaded through D102 and D103 by R113 and R114. The outputs of TR103 and TR104 are taken from the anodes of D102 and D103 to the bases of another LTP TR107 and TR108. C103 determines t

27、he frequency response to ensure stability. As before, R121 and R122 reduce the gain of this LTP and the bias current is set to about 8mA by R123. The collectors of TR107 and TR108 are loaded with a current mirror TR105 and TR106 to maximize gain and provide a push-pull output. Some of this output is

28、 fed back to the base of TR104 through C106 and R116. This defines the open-loop frequency response independently of the output stage characteristics to ensure stability. RadioFans.CN 收音机爱 好者资料库 Crown International, Inc. 3 Finally, the Vbe multiplier TR109, R125 and R124 provides the output stage wi

29、th two voltage signals which are identical except they are offset by a voltage varying between about 2.1V (heatsink hot) and 2.4V (heatsink cold). C108 ensures that the two offset signals are identical at AC. The current source consisting of TR102, R106, D100 and D101 determines the operating point

30、of the whole class A driver. Therefore, one can mute the amplifier by switching this current source off. The current source is switched off by TR101, R104, and C100. When TR101 is switched on, D100 and D101 are shorted out through R104, which mutes the current source. C100 is discharged in the proce

31、ss. When TR101 is switched off, C100 charges up through R105 until D100 and D101 are fully conducting which activates the current source. TR101 is controlled by TR100, R102, R101, ZD107, R103, and R100. If the PIC is absent or its +5V supply has failed, the MUTE1 line will be in a high impedance sta

32、te, which will not allow proper operation. The 4.7V reference supplied by R101 and ZD107 and emitter resistor R103 sets the current through TR100 to approximately 200A. This is enough to switch TR101 on and mute the amplifier. This is the default state. When working, the PIC controls the state of th

33、e MUTE1 line. To mute the amplifier, the MUTE1 line is set to 0V. The current through TR100 is then set to about 4.2mA since R100 is essentially in parallel with R103. This mutes the amplifier as before. To activate the amplifier, the MUTE1 line is set to +5V. This, through R100, reverse biases the

34、base-to-emitter junction of TR100. Thus, TR100 is switched off, as is TR101 so the amplifier becomes active. Under normal conditions the signals at the bases of TR103 and TR104 will be the same. However, under fault conditions, such as DC offset at the output, the base voltages will become offset al

35、so. For example, in the event of a large offset of +50VDC at the output, a positive DC voltage will appear at the feedback point and thus at the base of TR104. This DC voltage will make D105 conduct protecting C102, so the resultant voltage at the base of TR104 should be 0.6 + 50V x R115/(R115+R117)

36、, about 4V. However, the important issue is that this voltage is positive. In the event the voltage is negative this indicates that the feedback divider is faulty. The voltage at the base of TR104 being positive while the base of TR103 is nearly 0V will then reverse bias the TR104 base-to-emitter ju

37、nction, turning off the transistor. Therefore, no voltage should appear across R109 and R114 while twice the normal voltage will appear across R108 and R113. Should this not be the case, it indicates a fault in the input stage itself. The same process should now cause TR104, TR105 and TR106 to be of

38、f and TR108 to be fully on Class AB Output Stage The input of the output stage is loaded by C107. This defines the HF input impedance and thus prevents oscillations that are caused by the variable, non-linear and sometimes negative input impedance. Resistors R126 and R127 ensure that output offsets

39、are minimized when the amplifier is muted. D114 and D115 prevent the output from exceeding the power supply rails in the face of flyback pulses from reactive loads. The output stage consists of a symmetrical Siklai follower TR112, TR114, R128, TR113, TR115, R129, R131, R130, C114 generating the high

40、 current drive required for the parallel connected symmetrical follower output stage TR116, TR117, TR118, TR119, R142, R144, R146, R148, TR120, TR121, TR122, TR123, R143, R145, R147, R149. V-I limiting is controlled by D108, D109, TR110, TR111, R134, R136, R138, R139, C117, R135, R137, R140, R141, C

41、118, R132, C115, R133, C116, D112, D113, ZD108, ZD109, R187. C150, C151, C152, C153 stabilize TR110 and TR111 to prevent oscillations in the output when sourcing high current into low impedance loads. RadioFans.CN 收音机爱 好者资料库 Crown International, Inc. 4 Protection Scheme Output Stage Output stage pro

42、tection is accomplished by a three-slope V-I limiting circuit having limiting characteristics chosen to emulate the safe operating area of the output stage transistors and their maximum operating temperature. The V-I limiting works by controlling TR110: when the base-to-emitter voltage of TR110 exce

43、eds about 0.65V, TR110 turns on and steals current, via D108, from the input of the output stage and thereby limits the output. Thus, V-I limiting is controlled by controlling the base-to-emitter voltage of TR110. Each output device has its own current sharing resistor R142, R144, R146, R148 the vol

44、tage across which is proportional to the current flowing in the output device. These voltages are sampled and summed by R134, R136, R138, R139. C117 ensures stability when V-I limiting is activated. The voltage across the output devices is sampled by R142, R144, R146, R148 (R162 and ZD103 limit the

45、voltage range to reduce off-load distortion) and this, summed with the output current derived signals from R134, R136, R138, R139 controls TR110 for output voltages less than about 3Vpk. Thus, the amplifier is protected for short circuits because the base-to-emitter voltage of TR110 increases when o

46、utput current increases and when voltage across the output devices increases. For output voltages exceeding about 3Vpk, ZD109 conducts connecting R162 to sense the output voltage. In this case, as output voltage increases, the base- to-emitter voltage of TR110 reduces, thus the current limit is incr

47、eased as the output voltage increases, defining the 3rd slope of the limiting characteristic. Bridge Imbalance Protection During normal operation, the bridged output is fully differential mode with little or no common-mode signal component. Activation of the output stage current limiters erratically

48、 upsets this state, producing a large common-mode error imbalance that can destroy the output stages. The bridge imbalance detection is performed by R13, R12, R15, TR11 and R17. In two-channel mode, the BRIDGE1+2 line is pulled up to about +13V. This switches TR11 on through R17. The collector of TR

49、11 is connected to pin 23 of IC1 (PIC). The input of the PIC is internally protected by diodes against inputs above +5V and below 0V. Thus, in two-channel mode, pin 23 of IC1 receives no signal. In bridge mode, the BRIDGE1+2 line is held at 0V, which switches TR11 off. Now pin 23 of IC1 can receive a signal. R13 and R12 sum the output of each channel, the result appearing across R15, which sets the sensitivity. If the bridge is balanced, the voltage across R15 will be 0V. If the bridge is unbalanced, there will be voltage ac