Yamaha_MagicStomp_UB99MKI 电路图.pdf

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1、UB99 1 SERVICE MANUAL GA 011703 Copyright (c) Yamaha Corporation. All rights reserved. PDF-K244 03.11 HAMAMATSU, JAPAN 20031201-28000 CONTENTS SPECIFICATIONS. 3 PANEL LAYOUT. 4 BLOCK DIAGRAM. 5 CIRCUIT BOARD LAYOUT. 6 DISASSEMBLY PROCEDURE. 6 LSI PIN DESCRIPTION. 8 IC BLOCK DIAGRAM. 11 CIRCUIT BOARD

2、. 12 INSPECTIONS / FACTORY SET . 14/18 BACKUP THE USER PATCH DATA . 22 ERROR MESSAGES. 23 PARTS LIST CIRCUIT DIAGRAM GUITAR EFFECTS PROCESSOR UB99 （目次）（総合仕様）（）（）（）（分解手順）（LSI端子機能表）（IC図）（基板図）（検査）（）（）（回路図） RadioFans.CN 收音机爱好者资料库 2 UB99 WARNING: CHEMICAL CONTENT NOTICE! The solder used in t

3、he production of this product contains LEAD. In addition, other electrical/electronic and/or plastic (Where applicable) components may also contain traces of chemicals found by the California Health and Welfare Agency (and possibly other entities) to cause cancer and/or birth defects or other reprod

4、uctive harm. DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT SO EVER! Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose eyes to solder/flux vapor! If you come in contact with sold

5、er or components located inside the enclosure of this product, wash your hands before handling food. IMPORTANT NOTICE This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed that basic service procedures inherent to the industry, and

6、more specifically Yamaha Products, are already known and under- stood by the users, and have therefore not been restated. WARNING :Failure to follow appropriate service and safety procedures when servicing this product may result in per- sonal injury, destruction of expensive components and failure

7、of the product to perform as specified. For these reasons, we advise all Yamaha product owners that all service required should be performed by an authorized Yamaha Retailer or the appointed service representative. IMPORTANT :This presentation or sale of this manual to any individual or firm does no

8、t constitute authorization certifi- cation, recognition of any applicable technical capabilities, or establish a principal-agent relationship of any form. The data provided is belived to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and service departmen

9、ts of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable and changes in specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the distributors Service Division. WARNING :S

10、tatic discharges can destroy expensive components. Discharge any static electricity your body may have accumulated by grounding yourself to the ground bus in the unit (heavy gauge black wires connect to this bus.) IMPORTANT :Turn the unit OFF during disassembly and parts replacement. Recheck all wor

11、k before you apply power to the unit. Components having special characteristics are marked and must be replaced with parts having specification equal to those originally installed. 印商品、安全維持重要部品。交換場合、安全必指定部品使用。 WARNING RadioFans.CN 收音机爱好者资料库 UB99 3 SPECIFICATIONS Digital Section Digital signal proce

12、ssing effector Includes special editor application “Sound Editor for MAGICSTOMP” Patch Select: 2 Modes Built-in Chromatic Auto Tuner Communications Receive: Parameter Change, Bulk In (1 patch), Bulk In (99 patch) Transmit: Bulk Out (99 patch) Controller/Switch Knob x4 CONTROL1, 2, 3, VOLUME Push Swi

13、tch x4 , +, ON/OFF, STORE Slide Switch x1 INPUT LEVEL (HIGH/LOW) Display 16 x 2 character LCD (w/Back light) LED x 3 (, +, ON/OFF) Connections INPUT: Standard Monaural Phone Jack OUTPUT L/MONO, R: Standard Monaural Phone Jack USB AC IN A/D Converter 24 bit + 3 bit Floating D/A Converter24 bit Sampli

14、ng Frequency44.1 kHz Memory AllocationsPreset: 99 User: 99 Input Level/Impedance INPUT HIGH: -25dBm/1 M INPUT LOW : -15dBm/1 M Output Level/Impedance OUTPUT L/MONO, R: 0dBm/1 k Power Exclusive Power Adaptor (AC-10) AC Output: AC 12 V, 1 A Power Consumption12 W Dimensions (W x H x D) 164 x 62 x 176 m

15、m (6-7/16 x 2-7/16 x 6-15/16) Weight910 g (2lbs.) AccessoriesPower Adaptor (AC-10) CD-ROM USB Cable Owners Manual Patch List （総合仕様）部専用 “Sound Editor for MAGICSTOMP” 同梱：2 内蔵通信機能受信 Parameter Change, Bulk In (1 patch), Bulk In (99 patch) 送信 Bulk Out (99 patch) / 4 CONTROL1, 2, 3, VOLUME 4 , , ON/O

16、FF, STORE 1 INPUT LEVEL (HIGH/LOW) 162 character LCD (付) LED3 (, , ON/OFF) 接続端子 INPUT (標準) OUTPUT L/MONO, R (標準) USB AC IN A/D 243 D/A24 周波数44.1 kHz 数：99 ：99 入力/ INPUT HIGH：25dBm/1 M INPUT LOW：15dBm/1 M 出力/ OUTPUT L/MONO, R：0dBm/1 k 電源専用電源(AC-10) 入力：AC 100V, 50/60 Hz 出力：AC12V, 1000mA 消費電力12 W 寸法(W x

17、 H x D)16462176 mm 重量910 g 付属品電源(AC-10) CD-ROM USB 取扱説明書 RadioFans.CN 收音机爱好者资料库 4 UB99 PANEL LAYOUT q Display w CONTROL Knobs e VOLUME Knob r STORE Button t -Switch, + Switch, ON/OFF Switch y INPUT Jack u INPUT LEVEL HIGH/LOW Switch i OUTPUT L/MONO, R Jacks o USB Jack !0 AC IN Jack (Power Adaptor)

18、Top Panel Rear Panel （）（）（）（）（）（, ,ON/OFF）（端子）（切替）（端子）（USB 端子）（電源端子）（）（） UB99 5 BLOCK DIAGRAM DM JK101 3126 7 3 31 57 1 2 5 7 6 67 1 21 IC101 (8P) IC102 (8P) IC104 (28P) IC105 (8P) IC106 (8P) IC7 (64P)IC4 (100P) IC1 (48P) SYSTEM RESET IC2 (28P) IC10 (44P) IC6 (44P) D106112 TR105,106 IC5

19、(176P) 2 3 4 5 19 15 13,14 12 4 6366,67 55,653 28 27 26 25 IC103 (8P) IC3 (5P) JK102 JK103 CN1 JK104 AC-10 X 3X 2 X 1 IC111 IC109 IC108 IC112 IC113 12,13 （） 6 UB99 CIRCUIT BOARD LAYOUT DISASSEMBLY PROCEDURE 1.Bottom Case (Time required: About 1 minute) 1-1.Remove the four (4) screws marked 40 and th

20、e two (2) screws marked 30. The bottom case can then be removed. (Fig.1) 1. (所要時間: 約1 分) 1-1.404本302本外、外。 (図1) 4040 30 Bottom case （） 30: Bind Head Tapping Screw-B3.0X8 MFZN2BL (EP600190) 40: Bind Head Tapping Screw-P4.0X8 MFZN2BL (VB931600) Fig.1 DM Bottom view Bottom view （）（分解手順）（+B）（+P）（図1）

21、 UB99 7 Fig.2 110 Knob （） Rear panel （） Foot switch （） Hexagonal nut（特殊六角） Foot switch （） Spring Washer（座金） Hexagonal nut （特殊六角） AC Cord Column （AC） Flat Washer （特殊平座金） 120 130 9090 DM 90: Bind Head Tapping Screw-P3.0X8 MFZN2BL (EP630220) 110: Bind Head Screw3.0X8 MFZN2BL (VA295800) 120: Hexagonal N

22、ut9.0 12X2 MFNI33 (LX200060) 130: Flat Washer9.0X14X0.5 MFNI33 (VL802300) Rear view Top view Bottom view 2.Rear Panel (Time required: About 3 minutes) 2-1.Remove the bottom case. (See Procedure 1.) (Fig. 2) 2-2.Remove the two (2) screws marked 110, the three (3) hexagonal nuts marked 120 and the thr

23、ee (3) flat washers marked 130 from the rear panel. AC cord column and the rear panel can then be removed. (Fig. 2) 2. (所要時間: 約3 分) 2-1.外。 (1項参照) 2-2.面1102本120特殊六角 3 個、 130特殊平座金 3 個外、AC 外。 (図2) 4.Foot Switch (Time required: About 3 minutes) 4-1.Remove the bottom case. (See Procedure 1.) 4-2.Remove

24、the rear panel. (See Procedure 2.) 4-3.Remove the DM circuit board. (See Procedure 3.) 4-4.Remove the hexagonal nut of the foot switch. The foot switch can then be removed. (Fig.2, Photo. 1) 4. (所要時間: 約3 分) 4-1.外。 (1項参照) 4-2.外。 (2項参照) 4-3.DM 外。 (3項参照) 4-4.特殊六角外、外。 (図2、写真1) Photo. 1 3.DM Circuit Boa

25、rd (Time required: About 3 minutes) 3-1.Remove the bottom case. (See Procedure 1.) 3-2.Remove the rear panel. (See Procedure 2.) 3-3.Remove the four (4) knobs from the front panel. 3-4.Remove the eight (8) screws marked 90. The DM circuit board can then be removed. (Fig. 2) （図2）（+P）（+小）（特殊六角）（特殊

26、平座金）（写真1） 3.DM (所要時間: 約3分) 3-1.外。 (1項参照) 3-2.外。 (2項参照) 3-3.4個外。 (図2) 3-4.908本外、 DM外。 (図2) 8 UB99 LSI PIN DESCRIPTION DM: IC4 PIN NO. I/OFUNCTIONNAME PIN NO. I/OFUNCTIONNAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

27、46 47 48 49 50 VCC CS7/TMO0/TP8/PB0 CS6/TMIO1/TP9/PB1 CS5/TMO2/TP10/PB2 CS4/TMIO3/TP11/PB3 TP12/PB4 TP13/PB5 TP14/PB6 TP15/PB7 RESO VSS TXD0/P90 TXD1/P91 RXD0/P93 RXD1/P93 IRQ4/SCK0/P94 IRQ5/SCK1/P95 D0/P40 D1/P41 D2/P42 D3/P43 VSS D4/P44 D5/P45 D6/P46 P47/D7 P30/D8 P31/D9 P32/D10 P33/D11 P34/D12 P3

28、5/D13 P36/D14 P37/D15 VCC P10/A0 P11/A1 P12/A2 P13/A3 P14/A4 P15/A5 P16/A6 P17/A7 VSS P20/A8 P21/A9 P22/A10 P23/A11 P24/A12 P25/A13 - I/O I/O I/O I/O I/O I/O I/O I/O O - I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O - I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O - I/O I/O I/O I/O I/O I/O I/O I/O - I/O

29、I/O I/O I/O I/O I/O Analog power supply +3.3V Chip select / / / Port B Data transmission / Port B Reset Ground Data transmission / Port 9 Data reception / Port 9 Interropt request / Serial clock / Port 9 Data bus / Port 4 Ground Data bus / Port 4 Port 4 / Data bus Port 3 / Data bus Analog power supp

30、ly +3.3V Port 1 / Address bus Ground Port 2 / Address bus 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 P26/A14 P27/A15 P50/A16 P51/A17 P52/A18 P53/A19 VSS P60/WAIT P61/BREO P62/BACK P67/ STBY RE

31、S NMI VSS EXTAL XTAL VCC P63/AS P64/RD P65/HWR P66/LWR MD0 MD1 MD2 AVCC VREF AN0/P70 AN1/P71 AN2/P72 AN3/P73 AN4/P74 AN5/P75 DA0/AN6/P76 DA1/AN7/P77 AVSS IRQ0/P80 CS3/IRQ1/P81 CS2/IRQ2/P82 ADTRG/CS1/IRQ3/P83 CS0/P84 VSS TCLKA/TP0/PA0 TCLKB/TP1/PA1 TCLKC/TIOCA0/TP2/PA2 TCLKD/TIOCB0/TP3/PA3 A23/TIOCA1

32、/TP4/PA4 A22/TIOCB1/TP5/PA5 A21/TIOCA2/TP6/PA6 A20/TIOCB2/TP7/PA7 I/O I/O I/O I/O I/O I/O - I/O I/O I/O I/O I I I - I O - O O O O I I I - I I I I I I I I/O I/O - O I/O I/O I/O - I/O I/O I/O I/O I/O I/O I/O I/O Port 2 / Address bus Port 5 / Address bus Ground Port 6 Port 6 / System clock output Stand

33、-by mode signal Reset Non-maskable interrupt Ground Clock Clock Power supply +3.3V Port 6 Model control Power supply +3.3V for A/D Reference Voltage for A/D Analog input / Port 7 D/A output / Analog input / Port 7 Ground for A/D Interropt request / Port 8 Chip select / Interropt request / Port 8 Chi

34、p select / Interropt request / Port 8 Ground Timer clock / Pulse output / Port A Timer clock / Output comparison / Pulse output / Port A Timer clock / Input capture / Pulse output / Port A Address bus / Output comparison / Pulse output / Port A Address bus / Input capture / Pulse output / Port A Add

35、ress bus / Output comparison / Pulse output / Port A Address bus / Input capture / Pulse output / Port A HD6413008VF25 (X4196A00) CPU (MAIN) （LSI 端子機能表） UB99 9 PIN NO. I/OFUNCTIONNAME PIN NO. I/OFUNCTIONNAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 VCOM AINR+ AINR- AINL+ AINL- VREF AGND VA P/S MCLK LRCK BIC

36、K SDTO SDTI O I I I I I - - I I I I O I Common voltage output , VA/2 Rch analog positive input Rch analog negative input Lch analog positive input Lch analog negative input Reference voltage Analog ground +3.3V Analog power supply Paralle/serial mode select Master clock input Input/output channel cl

37、ock Audio serial data clock Audio serial data output Audio serial data input 15 16 17 18 19 20 21 22 23 24 25 26 27 28 CKS0 CKS1 DIF DFS PDN DEM0 DEM1 VT VD DGND AOUTL- AOUTL+ AOUTR- AOUTR+ O I I I I I I - - - O O O O Master clock select Digital audio interface select Double speed sampling mode Powe

38、r-down mode De-emphasis frequency select Output buffer power supply Digital power supply Digital ground Lch analog negative output Lch analog positive output Rch analog negative output Rch analog positive output AK4528VF (XY624A00) ADC/DAC (CMOS A/D & D/A Converter)DM: IC104 DM: IC7 PIN NO. I/OFUNCT

39、IONNAME PIN NO. I/OFUNCTIONNAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 P12/DQ2/AN2 P13/DQ3/AN3 P14/DQ4/AN4 P15/DQ5/AN5 P16/DQ6/AN6 P17/DQ7/AN7 CNVSS RESET VCCE VREF VSS XIN VOUT VCC CNVSS2 P60(LED0) P61(LED1) P62(LED2) P63(LED3) PVSS PVCC DVCC USBVREF

40、TrON D0+ D0- P20 P21 P22 P23 P24 P25 I/O I/O I/O I/O I/O I/O I I - I - I O - I I/O I/O I/O I/O - - - - O I/O I/O I/O I/O I/O I/O I/O I/O Port P1 (In/output) Chip active System reset input Analog power supply +3.3V Reference voltage input Ground Clock input Clock output Power supply +3.3V Chip active

41、 Port P6 (In/output) Analog power supply +3.3V USB reference power supply USB reference volyage output USB upstream in/output Port P2 (In/output) 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 P26 P27 P50/INT0 P51/CNTR0 P52/INT1 P53 P54 P55 P56 P57 P0

42、0 P01 P02 P03 P04 P05 P06 P07 P40/EXDREQ/RXD P41/EXDACK/TXD P42/EXTC/SCLK P43/EXA1/SRDY P30 P31 P32 P33/EXINT P34/EXCS P35/EXWR P36/EXRD P37/EXA0 P10/DQ0/AN0 P11/DQ1/AN1 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Po

43、rt P2 (In/output) Port P5 (In/output)/Interruption input Port P5 (In/output)/ Port P5 (In/output)/Interruption input Port P5 (In/output) Port P0 (In/output) Port P4 (In/output)/Serial I/O/External bus interface Port P3 (In/output) Port P3 (In/output)/External bus interface Port P1 (In/output) M38K07

44、M4L-303HP (X3921200) CPU (USB) 10 UB99 PIN NO. I/OFUNCTIONNAME PIN NO. I/OFUNCTIONNAME 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

45、75 76 77 78 79 80 81 82 83 84 85 86 87 88 Vdd Vss XI XO Vdd5 /SYNCI /SYNCO Vdd5 CKI CKO CKSEL Vss MCKS /SSYNC /IC /TEST BTYP /IRQ TRIG Vdd5 Vss /CS /WR /RD CA7 CA6 CA5 CA4 CA3 CA2 CA1 Vss Vdd CD15 CD14 CD13 CD12 CD11 CD10 CD09 CD08 CD07 CD06 Vss Vdd Vdd5 CD05 CD04 CD03 CD02 CD01 CD00 /WAIT Vss SI0 S

46、I1 SI2 SI3 SI4 SI5 SI6 SI7 Vss Vdd5 SO0 SO1 SO2 SO3 SO4 SO5 SO6 SO7 Vss DB00 DB01 DB02 DB03 DB04 DB05 DB06 DB07 DB08 DB09 DB10 DB11 DB12 Vdd5 Vdd I O I O I O I I I I I I O I/O I I I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O I I I I I I I I O O O O

47、O O O O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Power supply (3.3 V) Ground System master clock input (60 MHz or 30 MHz) System master clock output (High or 30 MHz) Power supply (5 V) Sync. signal input Sync. signal output Power supply (5 V) System clock input (30 MHz) System clock outpu

48、t (30 MHz) System master clock select (0: 60 MHz, 1: 30 MHz) Ground Serial I/O master clock input (128 x Fs) Serial I/O Sync. signal output Initial clear (RESET) Test mode setting (0: Test, 1: Normal) Data bus type select (0: 8 bit, 1: 16 bit) IRQ output Trigger signal input/output Power supply (5 V) Ground chip select signal input Write signal input Read signal input Address bus of internal register Ground Power supply (3.3 V) Data bus of internal register Ground Power supply (3.3 V)