Aiwa-XRM200-cs-sm 电路图 维修手册.pdf
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1、SERVICE MANUAL DATA XR-M200 XR-M201 XRM200 RCAAT11 SYSTEMTYPE REMOTE CONTROLLER COMPACT DISC STEREO SYSTEM BASIC TAPE MECHANISM : 2ZM-1 YR9NC / YR11NC BASIC CD MECHANISM : 3ZG-3 E3NC LH, U, K, G, HA, HR, HS EZ S/M Code No. 09-006-425-1R1 REVISION This Service Manual is the Revision Publishing and re
2、places Simple Manual XR-M200 / XR-M201 (S/M Code No. 09-004-425-1T1). This Service Manual does not include TAPE MECHANISM EXPLODED VIEW adding this pin to pin FIN1 generates RF signal, and subtracting it generates FE signal. 2FIN1IConnects to the pickups photo diode. 3EIConnects to the pickups photo
3、 diode; subtracting this pin from pin F generates TE signal. 4FIConnects to the pickups photo diode. 5TBIInput for DC component of TE signal. 6TEIConnects to the resistor between this pin and TE pin for setting the gain of TE signal. 7TEOOutput for TE signal. 8TESIIInput for TES (Track Error Sense)
4、comparator, TE signal is band-passed and inputted. 9SCIIInput for shock detection. 10THIFor setting tracking gain time constant. 11TAOTA amplifier output pin. 12TDIFor constructing tracking phase compensation constant between TD and VR pins. 13TDOFor setting tracking phase compensation. 14JPIFor set
5、ting the amplifier of tracking jump signal (kick pulse). 15TOOOutput for tracking control signal. 16FDOOutput for focusing control signal. 17FDIFor constructing focusing phase compensation constant between FD and FA pins. 18FAOFor constructing focusing phase compensation constant between FD and FA p
6、ins. 19FAIFor constructing focusing phase compensation constant between FA and FE pins. 20FEOOutput for FE signal. 21FEIConnects to the gain-setting resistor of FE signal between this pin and FE pin. 22A-GNDGND for analog signals. 23SP OSingle end output of CV+ and CV pin input signal. 24SPI 25SPGIC
7、onnects to the gain-setting resistor during spindle 12cm mode. 26SPIConnects to spindle phase compensation constant together with SPD pin. 27SPDOOutput for spindle control signal. 28SLEQIConnects to sled phase compensation constant. 29SLDOOutput for sled control signal. 30SLIInput for sled-sending s
8、ignal from microcontroller. 31SL+IInput for sled-sending signal. 32JP IInput for tracking-jump signal from DSP. 33JP+ 34TGLIInput for tracking gain control signal from DSP; gain is low if TGL = H. 35TOFFIInput for tracking off control signal from DSP; off if TOFF = H. 36TESOOutputs TES signal to DSP
9、. 37HFLO HIGH FREQUENCY LEVEL; used to determine whether the main beam is on a pit or on a mirror. 38SLOFIInput for sled servo off control. Pin No.Pin NameI/ODescription IC, LA9241ML 34 39CV IInput for CLV error signal from DSP. 40CV+ 41RFSMOOutput for RF. 42RFSOFor setting RF gain and 3T compensati
10、on constant together with RFSM. 43SLCO SLICE LEVEL CONTROL; output for controlling the data slice level of DSP with RF waveform. 44SLIIInput for controlling the data slice level of DSP. 45D-GNDGND for digital system. 46FSCOOutput pin for focus search smoothing capacitor. 47TBCI(Tracking Balance Cont
11、rol) EF balance variable range setting pin. 48NCNot connected. 49DEFOOutput for disk defect detection. 50CLKIStandard clock input; DSPs 4.23MHz is inputted. 51CLIClock input for microcontroller command. 52DATIData input for microcontroller command. 53CEIChip-enable input for microcontroller command.
12、 54DRFODetect RF; output for RF level detection. 55FSSI(Focus Search Mode) = search/+search against reference voltage switching pin. (Not used) 56VCC2VCC pin for servo and digital systems. 57REFIIFor connecting pass capacitor to reference voltage. 58VROReference voltage output. 59LF2For setting disk
13、 defect-detection time constant. 60PHIConnects to capacitor for RF signal peak hold. 61BHIConnects to capacitor for RF signal bottom hold. 62LDDOOutput for APC circuit. 63LDSIInput for APC circuit. 64VCC1VCC pin for RF system. Pin No.Pin NameI/ODescription 35 1DEFIIDefect detection signal (DEF) inpu
14、t. 2TAIITest input. A pull-down resistor is built in. (Must be connected to 0V.) 3PDOOExternal VCO control phase comparator output. 4VVSSInternal VCO ground. (Must be connected to 0V.) 5ISETOPDO output current adjustment resistor connection. 6VVDDInternal VCO power supply. 7FRVCO frequency range adj
15、ustment. 8VSSDigital system ground. (Must be connected to 0V.) 9EFMOOSlice level control; EFM signal output. 10EFMINISlice level control; EFM signal input. 11T2ITest input. A pull-down resistor is built in. (Must be connected to 0V.) 12CLV+ O Disc motor control output. 13CLV Three-value ouput is als
16、o possible when specified by microprocessor command. 14V/PO Rough servo/phase control automatic switching monitor output. Outputs a high level during rough servo and a low level during phase control. 15HFLITrack detection signal input. This is a Schmitt input. 16TESITracking error signal input. This
17、 is a Schmitt input. 17TOFFOTracking off output. 18TGLOTracking gain switching output. Increase the gain when low. 19JP+ O Track jump output. 20JP Three-value output is also possible when specified by microprocessor command. 21PCKOEFM data playback clock monitor. Outputs 4.3218 MHz when the phase is
18、 locked. (Not used) Synchronization signal detection ouput. Outputs a high level when the synchronization signal 22FSEQOdetected from the EFM signal and the internally generated synchronization signal agree. (Not used) 23VDDDigital system power supply. 24SL+ OSerial data command sled signal output t
19、erminal from microprocessor. 25SL 26NCNot connected. 27PU INICD pickup inside limit switch. 28CD-R/WICD-R/CD-RW disc select control. 29EMPHODe-emphasis monitor pin. A high level indicates playback of a de-emphasis disk. (Not used) 30C2FOC2 flag output. (Not used) 31DOUTODigital output (EIAJ format).
20、 32T3 ITest input. A pull-down resistor is built in. (Must be connected to 0V.) 33T4 34NCNot connected. 35MUTELOLeft channel one-bit D/A converter mute output. 36LVDDLeft channel one-bit D/A converter power supply. 37LCHOOLeft channel one-bit D/A converter output. 38LVSSLeft channel one-bit D/A conv
21、erter ground. (Must be connected to 0V.) Pin No.Pin NameI/ODescription IC, LC78622ED 36 39RVSSRight channel one-bit D/A converter ground. (Must be connected to 0V.) 40RCHOORight channel one-bit D/A converter output. 41RVDDRight channel one-bit D/A converter power supply. 42MUTERORight channel one-bi
22、t D/A converter mute ouput. 43XVDDCrystal oscillator power supply. 44XOUTO Connections for a 16.934MHz crystal oscillator element. 45XINI 46XVSSCrystal oscillator ground. (Must be connected to 0V.) 47SBSYOSubcode block synchronization signal output. (Not used) 48EFLGOC1, C2 single and double error c
23、orrection monitor pin. (Not used) 49PWOSubcode P, Q, R, S, T, U, V and W output. (Not used) 50SFSYO Subcode frame synchronization signal output. This signal falls when the subcode are in the standby state. (Not used) 51SBCKISubcode readout clock input. This is a Schmitt input. (Must be connected to
24、0V when unused) 52FSXOOutput for the 7.35 kHz synchronization signal divided from the crystal oscillator. (Not used) 53WRQOSubcode Q output standby output. 54RWCIReadwrite control input. This is a Schmitt input. 55SQOUTOSubcode Q output. 56COINICommand input from the control microprocessor. 57CQCKI
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