Jvc-KDLX-50-R-Service-Manual(1) 电路图 维修手册.pdf

《Jvc-KDLX-50-R-Service-Manual(1) 电路图 维修手册.pdf》由会员分享，可在线阅读，更多相关《Jvc-KDLX-50-R-Service-Manual(1) 电路图 维修手册.pdf（74页珍藏版）》请在收音机爱好者资料库上搜索。

1、SERVICE MANUAL CD RECEIVER No.49562 May. 2000 COPYRIGHT 2000 VICTOR COMPANY OF JAPAN, LTD. Printed in Japan 200005(O) VICTOR COMPANY OF JAPAN, LIMITED MOBILE ELECTRONICS DIVISION PERSONAL Digital: 0) RF signal Flow of functional operation until TOC read When the pickup correctly moves to the inner a

2、rea of the disc TERMINAL Microprocessor commands FMO MN662748RPM 32 FEED MOTOR +TERMINAL IC66126 REST SW When the disc correctly rotates Tracking Servo Loop ON Servo CLV Rough Servo AccelerationAccelerationAcceleration Microprocessor commands Spindle motor (-) IC661 2 0.5 Sec 0.5 Sec AN8806SB-W 27 M

3、N662748RPM 57 CN602 2 MN662748RPM 24 BCM Feed Section Focus Section Tracking Section Spindle Section Is the voltage output at IC631 pin 26 2.5V or Check the feed motor. Is 4V present at both sides of the feed motor? Is the wiring for IC941 (10) (15) correct? Check IC661. Is 6V or 2V present at IC601

4、 26 and 27? Is 5V present at IC601 pin 5? Check the feed motor connection wiring. Check the vicinity of IC941. Check CD 9V and 5V. YES YES YES NONO NO NO NO YES YES When the lens is moving: Check the circuits in the vicinity of IC661 pins 17 20. Check the pickup and its connections. NO YES YES YES D

5、oes the S-search waveform appear at IC601 pins 17 and 18? Is the disk rotated? Does the RF signal appear at TP1? Is 3.5V present at IC661 pins 1 and 2 ? Check the spindle motor and its wiring. Is 4V present at IC631 pin 25 ? Check the vicinity of IC661. Check IC601 and IC631. YES NO NO NO NONO YES Y

6、ES YES Check the circuits in the vicinity of IC601 10 18 or the pickup Is the RF waveform at TP1 distorted? Proceed to the Tracking section When the disc is rotated at first: Check the circuit in the vicinity of IC601 pins 20 40. Check IC601. Check the pickup and its connections. YESYES YES Is the t

7、racking error signal output at IC631 33? Approx. 1.2 V 4V 1314 CL-LGNDOUTLOUTRRGNDCR -CR + CL+VccINLNFLFILNFRINR 11129810 2143675 REFLREFR FILTER BA3220FV-X (IC301,IC401) : Driver 1. Pin layout & Block diagram 2. Pin functions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 CL+ Vcc INL NFL FIL NFR INR CR+ CR- RGND

8、 OUTR OUTL LGND CL- Powe supply terminal for amp. power supply terminal. input terminal. Negative feedback terminal. Filter terminal. Negative feedback terminal. Input terminal Power supply terminal for amp. Output terminal of internal amp. Rch GND terminal. Rch output terminal. Lch output terminal.

9、 Lch GND terminal. Output terminal of internal amp. Pin No. SymbolFunction 123456789101112 BA4905-V3 (IC961) : Regulator 1.Terminal layout 2.Block diagram EXT EXTACCAUDIO 9VCTRLILM 10VGND RESET RESETCOMPVDD 5.7VCD 8VVCCAJ 1 2 3 4 5 6 7 8 9 10 11 12 37K 5K REGULATOR Overvoltage protection circuit Pin

10、 no. Symbol Function RESET EXT output COMP output ACC VDD output AUDIO output CD output CTRL VCC ILM output AJ GND 1 2 3 4 5 6 7 8 9 10 11 12 If VDD voltage becomes 4V or less.RESET output becomes low level. This output voltage is approximately 0.5V lower than VCC. and max output current is 300mA. A

11、 voltage supply for ACC block. This output voltage is approximately 0.7V lower than VDDS. The max output current is 100mA. Control of the COMP output by inputting voltage. This output voltage is 5.7V, and max output current is 100mA. This voltage supply is for microcomputer. Whenever back up voltage

12、 supply is connected, the output keeps on running. This output voltage is 9.0v, and max output current is 500mA. This voltage supply for AUDIO. This output voltage is 8.0V, and max output current is 1A. This voltage supply for CD. Output selector of CD. AUDIO, ILM and EXT. To be connected with the B

13、ACK UP of car. This output voltage is 10V, and max output current is 500mA. Output voltage is adjustable. Putting a resistance between ILM and AJ or between AJ and GND makes ILM output voltage adjustable. Ground. 3.Pin function BD3860K (IC911) : E. volume 1. Pin layout 2. Block diagram 2. Block diag

14、ram 3. Pin function 1 11 33 23 34 44 22 12 13 12 7 8 10 11 41 42 43 44 1 2 3 4 65940363534332832313029191514 39383725242623222120181716 GNDFIL VCCSEL1 0 to 18 dB 0 to 18 dB VIN1LOUD1HF1LF1 DET1TIN1 TNF1BNF1 OUTF1 OUTR1 SI SC OUTR2 OUTF2 BOUT2BNF2TNF2TIN2BBOUT2MIX2VCA2DET2LF2HF2LOUD2VIN2SEL2 D2 C2 B2

15、 A2 D1 C1 B1 A1 BOUT1VCA1MIX1 BBOUT1 POWER SUPPLY INPUT GAIN INPUT GAIN MAIN VOLUME 0 to -40 dB LOUDNESS MAIN VOLUME 0 to -40 dB LOUDNESS LOW(f=50Hz) 6dB PROCESS CONTROL +3 to 12dB (f=10kHz) LOW(f=50Hz) 6dB PROCESS CONTROL +3 to 12dB (f=10kHz) TREBLE -14 to +14dB TREBLE -14 to +14dB BASS -14 to +14d

16、B BASS -14 to +14dB FADER CH1 FRONT 0 to -5 dB FADER CH2 FRONT 0 to -5 dB FADER CH1 REAR 0 to -5 dB FADER CH2 REAR 0 to -5 dB LOGIC INPUT SELECTOR 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 CH2 input terminal A CH2 input terminal B CH2 input terminal C CH2 input terminal D 1/2 VCC term

17、inal Ground terminal Serial data input terminal Serial clock input terminal Power supply CH2 rear output terminal CH2 front output terminal CH1 rear output terminal CH1 front output terminal CH1 bus filter setting terminal CH1 bus filter setting terminal CH2 bus filter setting terminal CH2 bus filte

18、r setting terminal CH2 treble filter setting terminal CH1 treble setting terminal CH2 treble input terminal CH2 BBE II signal output terminal CH2 output mix amp negative input terminal A2 B2 C2 D2 FIL GND SI SC VCC OUTR2 OUTF2 OUTR1 OUTF1 BOUT1 BNF1 BOUT2 BNF2 TNF2 TNF1 TIN2 BBOUT2 MIX2 Pin No. Symb

19、olFunction 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 CH2 high frequency VCA output terminal CH2 low frequency filter setting terminal CH2 high frequency filter setting terminal CH2 high frequency attack release time setting Non connect CH1 high frequency attack release time s

20、etting CH1 treble input terminal CH1 BBE II signal output terminal CH1 output mix amp. negative input terminal CH1 high frequency VCA output terminal CH1 low frequency filter setting terminal CH1 high frequency filter setting terminal CH1 loudness filter setting terminal CH1 main volume input termin

21、al CH2 loudness filter setting terminal CH2 main volume input terminal CH2 input gain output terminal CH1 input gain output terminal CH1 input terminal A CH1 input terminal B CH1 input terminal C CH1 input terminal D VCA2 LF2 HF2 DET2 NC DET1 TIN1 BBOUT1 MIX1 VCA1 LF1 HF1 LOUD1 VIN1 LOUD2 VIN2 SEL2

22、SEL1 A1 B1 C1 D1 Pin No. SymbolFunction VccWPSCLSDA A0A1A2GND A0 1 A1 2 A2 3 GND 4 8 Vcc 7 WP 6 SCL 5 SDA 32k bit EEPROM ARRAY 12bit 12bit ADDERESS DECODER SLAVE/WORD ADDRESS REGISTER 8bit DATA REGISTER ACK STARTSTOP CONTROL LOGIC HIGH VOLTAGE GEN. Vcc LEVEL DETECT Vcc GND AO,A1,A2 SCL SDA WP - - IN

23、 IN I/O IN Power supply Ground (0V) Slave address set Serial clock input Slave and word address/Serial data output Write protect input Pin No.I/OFunctions BR24C32F-X (IC703) : EEPROM 1. Pin function 2. Block diagram 3. Pin function 141312118109 1234756 VDDC1C4I/O4I/O3O/I4O/I3 I/O1O/I1O/I2I/O2VssC2C3

24、 BU4066BCFV-X (IC322) : Quad analog switch 1. Pin layout & Block diagram FAN8037 (IC581) : CD driver 1. Pin layout & Block diagram 2. Pin function 30 29 28 27 26 25 36 35 34 33 32 31 1 2 3 4 5 6 7 8 9 10 11 12 131415161718192021222324 484746454443424140393837 s w s w s w M S C M S C M S C D D D D D

25、D T.S.D STAND BY ALL MUTE POWER SAVE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 I I O I I O I I O I I I I I I - I I I I I I - O CH2 op-amp input(+) CH2 op-amp input(-) CH2 op-amp output CH3 op-amp input(+) Ch3 op-amp input(-) CH3 op-amp output CH4 op-amp input(+) CH4 op-amp input

26、(-) CH4 op-amp output(+) CH5 motor speed control CH5 forward input CH5 reverse input CH6 motor speed control CH6 forward input CH6 reverse input Signal ground CH7 forward input CH7 reverse input CH7 motor speed control Stand by Power save All mute Power supply voltage CH7 drive output(-) IN2+ IN2- O

27、UT2 IN3+ IN3- OUT3 IN4+ IN4- OUT4 CTL1 FWD1 REV1 CTL2 FWD2 REV2 SGND FWD3 REV3 CTL3 SB PS MUTE PVCC2 DO7- Pin No. Symbol I/OFunction 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 O O O - O O O O O O - O O O O - I O I I - I I O CH7 drive output(+) CH6 drive output(-) CH6 dri

28、ve output(+) Power ground2 CH5 drive output(-) CH5 drive output(+) CH4 drive output(-) CH4 drive output(+) CH3 drive output(-) CH3 drive output(+) Power ground1 CH2 drive output(-) CH2 drive output(+) CH1 drive output(-) CH1 drive output(+) Power supply voltage Regulator feedback input Regulator out

29、put Regulator reset input Bias voltage input Signal supply voltage CH1 op-amp input(+) CH1 op-amp input(-) CH1 op-amp output DO7+ DO6- DO6+ PGND2 DO5- DO5+ DO4- DO4+ DO3- DO3+ PGND1 DO2- DO2+ DO1- DO1+ PVCC1 REGOX REGX RESX VREF SVCC IN1+ IN1- OUT1 Pin No. Symbol I/OFunction VccVcc Input See Functio

30、n Table 1A 2A 3A 4A 1C 2C 3C 4C 1Y 2Y 2Y 3Y 4Y Output Output Output Output Sample as Load Circuit 1 Sample as Load Circuit 1 Sample as Load Circuit 1 1k 1k S1 CL InputsOutputs C L H H A X L H Y Z H L 1 2 3 4 5 6 7 14 13 12 11 10 9 8 HD74HC126FP-X (IC801) : Buffer 1. Pin layout 3. Block diagram 2. Fu

31、nction IN Vout OUT 1 3 2 OP1 Co1 IC-PST600M/G/-W (IC702) : System reset LA3460M-X (IC31) : FM noise canceller & Stereo MPX demodulator 123456789101112 242322212019181716151413 DRIVER HPFLPF LPF LPFPC PD VCO VCO STOP FF MAIN SCHMIT PACAN SEPARATION ADJ. SUB ANTI-BRIDGE DECODER SNC CONTROL HCC GATE TR

32、IG AGC 1. Pin layout 2. Block diagram 112 2413 3. Pin function 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Noise sensitivity adjustment Vcc=+8.0V High pass filter Stereo noise controlled voltage High cut controlled voltage pilot cancel signal input pilot cancel signal outpt Cerami

33、c resonator Phase comparator low pass filter Phase comparator low pass filter Phase locked loop signal input Active low Composite signal input Noise sense Noise AGC Gate time Signal hold Pilot output Vcc Capacitor for HCC SNC control HCC control Lch output Rch output Pican input Pican output Separat

34、ion ADJ NC NC 456kHz OSC Phase comp LPF (+) Phase comp LPF (-) GND PLL input Stereo indicator Composite input Pilot det LPF Pin No. FunctionDescription 11 1 12 4 10 15 25 13 14 16 24 23 21 18 19 17 22 2 3 5 8 7 9 206 + - - + + - - + + - + - + - + - IN 1 TAB IN 2 ST BY R.F IN 3 N.C PRE GND IN 4 ON TI

35、ME PWR GND4 OUT 4- OUT 4+ PWR GND3 OUT 3- OUT 3+ MUTE PWR GND2 OUT 2- OUT 2+ PWR GND1 OUT 1- OUT 1+ VCC3/4VCC1/2 LA4743B (IC941) :Power amp Muting & on time control circuit Protective circuit Mute circuit Ripple filter Stand by switch Protective circuit 123456789 10 11 12 13 14 15 16 17 18 19 20 21

36、22 23 24 25 TAB GND1 OUTFR+ STBY OUTFR- VCC1/2 OUTRR+ GND2 OUTRR- VREF INRR INFR SGND INFR INRL ONTIME OUTRL+ GND3 OUTRL- VCC3/4 OUTFL+ MUTE OUTFL- GND4 NC 1.Terminal layout 2.Block diagram 3.Pin function 1 2 3 4 5 6 7 8 9 10 11 12 13 Header of IC Power GND Output (-) for front Rch Stand by input Ou

37、tput (+) for front Rch Power input Output (-) for rear Rch Power GND Output (+) for rear Rch Ripple filter Rear Rch input Front Rch input Signal GND TAB GND1 RFO- STBY RFO+ VCC1/2 RRO- GND2 RRO+ R.F RRIN RFIN SGND 14 15 16 17 18 19 20 21 22 23 24 25 LFIN LRIN ONTIME LRO+ GND3 LRO- VCC3/4 LFO+ MUTE L

38、FO- GND4 NC Front Lch input Rear Lch input Power on time control Output (+) for rear Lch Power GND Output (-) for rear Lch Power input Output (+) for front Muting control input Output (-) for front Power GND Non connection Pin No. SymbolFunction Pin No. SymbolFunction COMMON DRIVER INSTRUCTION DECOD

39、ER INSTRUCTION REGISTER ADRAM 60 bits SEGMENT DRIVER LATCH CGRAM 5x9x16 bits DCRAM 48x8 bits CGROM 5x9x240 bits ADDRESS COUNTER ADDRESS REGISTER TIMING GENERATOR CLOCK GENERATOR SHIFT REGISTER CCB INTERFACE S60/COM9 S59/COM10 S58 S1 DI CL CE OSCI OSCO RES VDD VLCD VLCD1 VLCD2 VLCD3 VSS COM1 COM8 1 2

40、0 60 41 61 80 40 21 LC75811W (IC602) : LCD driver 1. Pin layout 2. Block diagram 3. Pin function 158 59 6065 66 67 68 6971 72 73 74 75 76 77 78 7980 O O O O - - I - O I I I I I O Segment driver output terminal Common driver output terminal Common driver output terminal Common driver output terminal

41、Power supply for logic section Power supply for LCD driver section LCD voltage input terminal Connect to ground Oscillation output terminal Oscillation input terminal Reset signal input terminal Chip enable input terminal Clock signal input terminal Serial data input terminal Segmrnt driver output t

42、erminal S3S60 COM0 COM3COM8 COM1 VDD VLCD VLCD1VLCD3 VSS OSCO OSCI RES CE CL DI S1S2 Pin No.SymbolI/OFunction 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33

43、S48 S47 S46 S45 S44 S43 S42 S41 S40 S39 S38 S37 S36 S35 S34 S33 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 S17 S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 DI CL CE OSC Vss VDD2 VDD1 INH VDD COM3 COM2 COM1 S52 S51 S50 S49 LC75823W (IC601) : LCD driver 1. Pin Layout & Symbol 2. Pi

44、n Function Pin No. 1 to 52 53 to 55 56 57 58 59 60 61 62 63 64 I/O O O - I I I - I/O I Segment output pins used to display data transferred by serial data input. Common driver output pins. The frame frequency is given by : t0=(fosc/384)Hz. Power supply connection. Provide a voltage of between 4.5 an

45、d 6.0V. Display turning off input pin. INT=L (Vss) - off (S1 to S52, COM1 to COM3=L INT=H (VDD)- on Serial data can be transferred in display off mode. Used for applying the LCD drive 2/3 bias voltage externally. Must be connected to VDD2 when a 1/2 bias drive scheme is used. Used for applying the L

46、CD drive 1/3 bias voltage externally. Must be connected to VDD1 when a 1/2 bias drive scheme is used. Power supply connection. Connect to GND. Oscillator connection. An oscillator circuit is formed by connecting an external resistor and capacitor at this pin. Serial data CE : Chip enable interface c

47、onnection to the controller. CL : Sync clock DI : Transfer data Symbol S1 to S52 COM1 to COM3 VDD INH VDDD1 VDD2 Vss OSC CE CL DI Function M5282FP-XE (IC321) : E. volume 1. Pin layout 3. Pin function 2. Block diagram 1 2 3 4 5 10 9 8 7 6 1 2 3 10 4578 9 1 2 3 4 5 6 7 8 9 10 Vcc/2 output for micropho

48、ne amp. Microphone amp. positive input terminal. Microphone amp. negative input terminal. Microphone amp. output terminal. Ground. Non connection. VCA input terminal. VCA control terminal. VCA output terminal. Power supply. Vcc/2 Amp+IN Amp-IN Amp OUT GND NC VCA IN Vc VCA OUT Vcc Pin No. SymbolFunction MSM534001E-77TS (IC854) : Flash memory 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A4 A6 A12 A16 Vcc A17 A13 A9 A3 A1 D0 D2 D3 D5 D7 A10 A5 A7 A15 NC A18 A14 A8 A11 A2 A0 D1 Vss D4 D6 CE OE 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 1. Pin layout 3. Block diagram 2. Pin function Symbol A0A18