Kenwood-DPFK-6010-V-Service-Manual(1) 电路图 维修手册.pdf

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1、In compliance with Federal Regulations, following are reproduc- tions of labels on, or inside the product relating to laser product safety. KENWOOD-Corp. certifies this equipment conforms to DHHS Regulations No. 21 CFR 1040. 10, Chapter 1, Subchapter J. DANGER : Laser radiation when open and interlo

2、ck defeated. AVOID DIRECT EXPOSURE TO BEAM. MULTIPLE VIDEO CD PLAYER DPF-K6010V SERVICE MANUAL 1998-8/B51-5471-00 (K/K) 399 i I 0 73 4 8 PALNTSC L R 1 1S -VIDEO 2 2 VARIABLE AUDIO OUTPUTVIDEO OUTPUT Panel * (A60-) Knob (K29-7354-14) Knob (K29-7352-03) Panel (CD) (A29-1016-02) Phone jack (E11-0224-05

3、) Phono jack (E63-0120-05) Cylindrical receptacle (E56-0014-05) Power cord bushing (J42-0083-05) AC power cord * (E30-) Slide switch (S31-2132-05) Phono jack (E63-0128-05) Knob (K29-7351-03) Knob (K29-7353-02) Front glass (B10-3403-03) Knob (K27-2178-04) KENWOOD badge (B43-0302-04) * Refer to parts

4、list on page 25. Refer to page 12 between Adjustment and Pc board if you want to know CD mechanism exploded View. DPF-K6010V(K) COVER1,1( 98.12.10 10:54 yW 2 RadioFans.CN 收音机爱 好者资料库 Audio (E30-0505-05)(E30-1427-05) (E03-0115-05) (A70-1226-05) : RC-P0610 Battery cover (A09-1104-08) cord . (1) Remote

5、control unit .(1) Batteries (R03/AAA) .(2) Video cord . (1) AC plug adaptor . (1) Use to adapt the plug on the power cord to the shape of the wall outlet. (Accessory only for regions where use is necessary.) VOLUME REMOTE CONTROL UNIT RC-P0610 DISC KEY CONTROL 1230 SLOW87 RETURN E SURROUND ECHO + -

6、GAME ZOOM 1 AUDIO MODE 234 5678 90+10PBC DISPLAY RESUME TIMEP.MODEDIGESTMEMORY REPEATCLEAR A-B REPEAT 4/PREV. NEXT/ 13/ SELECT RANDOM iI DPF-K6010V 2 CONTENTS / ACCESSORIES / CAUTIONS CONTENTS / ACCESSORIES / CAUTIONS.2 DISASSEMBLY FOR REPAIR.3 BLOCK DIAGRAM.4 CIRCUIT DESCRIPTION.5 ADJUSTMENT. 10 EX

7、PLODED VIEW .12 PC BOARD .13 SCHEMATIC DIAGRAM.17 EXPLODED VIEW .24 PARTS LIST.25 SPECIFICATIONS .Back cover Contents Accessories Before transporting or moving this unit, carry out the following operations. 1. Turn the unit ON but do not load a disc. 2. Wait a few seconds and verify that the display

8、 shown appears. 3. Wait until “no disc” is displayed and turn off the unit. Note related to transportation and move- ment n nO d I S C: Operation to reset The microcomputer may malfunction (impossibility to operate, erroneous display, etc.) when the connection cords are un- plugged while the unit is

9、 ON or due to an external factor. In this case, execute the following method to reset the microcomputer and return it to normal condition. ?Please be aware that resetting the unit will erase all stored informa- tion and return it to the factory settings. Set the POWER switch to OFF, and after severa

10、l seconds, set the POWER switch back to ON. Cautions DPF-K6010V(K) COVER1,1( 98.12.10 10:54 yW 3 RadioFans.CN 收音机爱 好者资料库 DPF-K6010V 3 DISASSEMBLY FOR REPAIR REAR SIDE Friction Arm How to open the tray if not comes out. (1) From the rear side of the CD mechanism, use a screw driver or the like to tur

11、n the friction arm fully counterclockwise. (2) Pull out the tray front wards by hand when the tray comes just out. * As for details of items in the below, refer to RXD-F3 service manual (B51-5091-00). (1) How to detach the tray. (2) How to attach the tray. (3) Replacing the pickup. DPF-K6010V(K) COV

12、ER1,1( 98.12.10 10:54 yW 6 RadioFans.CN 收音机爱 好者资料库 (CDM-27) (D40-1562-15) (X25- ) DPF-K6010V PD1 PD2 E F LD FEO TAO SLO RF FEI TEO VR1 F. B MDP RF C4M SQCK DATA XTAI VR2 TE-B TRACKING COIL FOCUS COIL VR3 T. G TEI DATA LRCKLRCK BCKBCK YUV7 YUV0 A IN MIC1/2 A OUT NTSC PAL Lch Rch RMR/RMF/BRKM Y C +9.5

13、V F A B D C E LD SW IC1 CXA1782BQ RF/SERVO DRIVER FOCUS COIL IC3 (1/6) TRACKING COIL DRIVER IC3 (2/6) FEED MOTOR DRIVER IC3 (3/6) DISC MOTOR DRIVER IC3 (4/6) ROTARY TRAY DRIVER LOADING MOTOR DRIVER DSP IC2 CXD2500BQ M M M M PICKUP Q2,3 LD BA6198S IC3 (5/6) IC3 (6/6) M3 LOADING MOTOR M4 ROTARY MOTOR

14、M1 DISC MOTOR M2 FEED MOTOR IC11 ES3210F FL DRIVER u-COM CONTROL/ MPEG/ IC12 ES3209F VIDEO ENCODER AUDIO D.A.C IC8 Q31 VIDEO AMP Q32,33 AMP VIDEO S1 S OUT VIDEO OUT J3 J2 L.P.F IC9 (1/2) L.P.F IC9 (2/2) MUTE J1 OUT AUDIO MIC AMP IC1 J1 J2 MIC1 MIC2 HM514260 4M DRAM IC13 4M ROM IC14 LOGIC PROGRAMMED

15、IC16 DIVIDER SENSOR REMOTE CONTROL A1 I/O EXPANDER 74HC166 IC17 FL DISPLAY 6-BT-267GK FL DRIVER uPD16311 IC2 KEY MATRIX +3.3V AVR IC15 SL SW LD SW UP/DOWN SW UNLD SW PS SW ST SW +5.0V AVR Q14 +6.5V AVR IC5 24.0V AVR Q13 D38 D36 D37 12.7V AC F1,2 TRANSFORMER AC IN DPF-K6010V 4 BLOCK DIAGRAM DPF-K6010

16、V(K) COVER1,1( 98.12.10 10:54 yW 7 DPF-K6010V No.NameI/ODescription 1VDDVoltage supply for 3.3V. 2RASODRAM row address strobe (active low). 3DWEODRAM write enable (active low). 412MA0MA8ODRAM multiplexed row and column address bus. 1328DBUS0DBUS15I/ODRAM data bus. 29RESETISystem reset (active low).

17、30VSSGround. 31VDDVoltage supply for 3.3V. 3239YUV0YUV7O Y is luminance, UV are chrominance data bus for screen Video interface. YUV (07) for 8 bit YUV mode. 40VSYNCI/OVertical sync for screen video interface, programmable for rising or falling edge. 41HSYNCI/OHorizontal sync for screen video interf

18、ace, programmable for rising or falling edge. 42CPUCLKI RISC and system clock input. CPUCLK is used only if SEL PLL 1 : 0 = 00. 43PCLK2XI/OPixel clock ; two times the actual pixel clock for screen video interface. 44PCLKI/OPixel clock qualifier in for screen video interface. 45(GFS) AUX0I/OGFS input

19、 from IC2 (CXD2500BQ). 46(SQSO) AUX1I/OInputs 80 bit Sub Q and 16 bit PCM peak-level data. 47(VFD D) AUX2I/OAuxiliary control pins. 48(MUTE) AUX3I/OH for muting, L for release. 49(IRQ) AUX4I/OAuxiliary control pins. 50VSSGround. 51VDDVoltage supply for 3.3V. 52VFD LI/OAuxiliary control pins. 53STBI/

20、OAuxiliary control pins. 54VFD CKI/OAuxiliary control pins. 5562LD0LD7I/ORISC interface data bus. 63LWRORISC interface write enable (active low). 64LOEORISC interface output enable (active low). 6567LCS (3, 1, 0)ORISC interface chip select (active low). 6879LA0LA11ORISC interface address bus. 80VSSG

21、round. 81VPPDigital supply voltage for 5V. 8287LA12LA17ORISC interface address bus. 88ACLKI/O Master clock for external audio DAC (8.192MHz, 11.2896MHz, 12.288MHz, 16.9344 MHz, and 18.432MHz). ODual-purpose pin. AOUT is the audio interface serial data output Pins SEL PLL 1 : 0 select phase-lock loop

22、 (PLL) clock frequency CPUCLK for the ES3210 :00 = bypass PLL. 89AOUT/SEL PLL0I01 = 54MHz PLL. 10 = 67.5MHz PLL. 11 = 81MHz PLL. 90ATCLKI/OAudio transmit bit clock. ODual-purpose pin. ATFS is the audio interface transmit frame sync. 91ATFS/SEL PLL1 I Pins SEL PLL 1 : 0 select phase-lock loop (PLL) c

23、lock frequency CPUCLK for the ES3210. See the SEL PLL0 pin above for the settings. 92DOEODRAM output enable (active low). 93AINIAudio interface serial data input. 94ARCLKIAudio receive bit clock. 95ARFSIAudio interface receive frame sync. 96TD MCLKITDM interface serial clock. 97TD MDRITDM interface

24、serial data receive. 98TD MFSITDM interface frame sync. 99CASODRAM column address strobe bank 0 (active low). 100VSSGround. 5 CIRCUIT DESCRIPTION 1. MPEG Microprocessor : IC11 (E3210F) Pin description DPF-K6010V(K) COVER1,1( 98.12.10 10:54 yW 10 DPF-K6010V No.NameI/ODescription 1, 2VSSGround. 3NCNo

25、used. 4, 5VCCVoltage supply, 5V. 6DISC CIClock for programming to access internal registers. 7AUX0 (CLOCK)OOutputs serial data transfer clock to IC2 (D.S.P). 8DSC D0I/OData for programming to access internal registers. 9AUX1 (FOK)OFocus OK output. Used for SENS output and servo auto sequencer. 10DIS

26、C SIStrobe for programming to access internal registers. 11AUX2 (RMR)OLoading motor forward direction output. 12DCLK/EXT CLK ODual-purpose pin. DCLK is the MPEG decoder clock. IEXT CLK is the external clock. EXT CLK input during bypass PLL mode. 13RSTIVideo reset (active low). 14AUX7 (RML)OLoading m

27、otor reverse direction output. 15MUTEONo used. 16VCCVoltage supply, 5V. 17MCLKNo used. 18AUX8 (LMR)OLoad motor opposite direction (taking out) output. 19TWS/SPLL OUTNo used. 20AUX9 (LMF)OLoad motor positive direction (dragging) output. 21, 22TSD/TBCKNo used. ODual purpose pin. RWS is the receive aud

28、io frame sync. Pins SEL PLL 1 : 0 select the PLL clock frequency for DCLK output. SEL PLL1SEL PLL0DCLK 23RWS/SEL PLL1I00Bypass PLL (Input Mode) 0127MHz (Output Mode) 1032.4MHz (Output Mode) 1140.5MHz (Output Mode) 24RST OUTOReset output (active low). 2531VSSGround. 32VCCVoltage supply, 5V. 33RSD/SEL

29、 PLL0 ODual purpose pin. RSD is the receive audio data input. ISEL PLL0 is the select PLL. See the table for pin no. 23. 34AUX10 (LDON)OLaser ON/OFF control. 35AUX11 (BRKM)ORotary motor deceleration output. 36AUX12 (A18)OAddress output to IC14 (4M DRAM). ODual purpose pin. RBCK is the receive audio

30、bit clock. 37RBCK/SER INSER IN is serial input DSC mode. I0 = Parallel DSC mode. 1 = Serial DSC mode. 38AUX13 (166L)OIC17 (TC74HC166AF), Shift/Load. 39AUX14 (166CK)OIC17 (TC74HC166AF), clock. 40AUX15 (R MUTE)ODigital mute control terminal. 41VSSAAnalog ground. 42VREF MIDAC and ADC minimum reference.

31、 Bypass to VCMR with 10uF in parallel with 0.1uF. 43VREF PIDAC and ADC minimum reference. Bypass to VCMR with 10uF in parallel with 0.1uF. 44, 45VCCAAnalog VCC, 5V. 46, 47AOR/AOLNo used. 2. VIDEO DAC : IC12 (ES3209F) Pin description 6 CIRCUIT DESCRIPTION DPF-K6010V(K) COVER1,1( 98.12.10 10:54 yW 11

32、DPF-K6010V No.NameI/ODescription 48, 49MIC1/MIC2IMicrophone (1, 2) input. 50, 51VSSAAnalog ground. 52VREFI Internal resistor divider generates Common Mode Reference (CMR) voltage. Bypass to analog ground with 0.1 uF. 53VCMI ADC Common Mode Reference (CMR) buffer output. CMR is approximately 2.25V. B

33、ypass to analog ground with 47 uF electrolytic in parallel with 0.1 uF. 54RSETIFull scale DAC current adjustment. 55COMPICom pen station pin. 56, 57VSSAVAnalog ground. 58CDACOModulated chrominance output. 59VCCAVAnalog VCC, 5V. 60VCCAVNo used. 61YDACOY luminance data bus for screen video port. 62, 6

34、3VSSAVAnalog ground. 64VDACOComposite video output. 65NCNo used. 66VCCVoltage supply, 5V. 67AUX6 (XLAT)OLatches serial data output to IC2 (CXD2500BQ). 68AUX5 (DATA)OOutputs serial data to IC2 (CXD2500BQ). 69AUX4 (NT/PAL)ONTSC/PAL video control. 70AUX3 (SENS)ISENS input from IC2 (CXD2500BQ). 71XOUTOC

35、rystal output. 72VSSGround. 73VCCVoltage supply, 5V. 74XINI27MHz crystal input. 7577VSSGround. 78VCCVoltage supply, 5V. 79PCLKI/O13.5MHz pixel clock. 80PCLK2XI/O27MHz (2 times pixel clock). 81DSC D7I/OData for programming to access internal registers. 82HSYNCOHorizontal sync (active low). 83DSC D6I/

36、OData for programming to access internal registers. 84VSYNCOVertical sync (active low). 85DSC D5I/OData for programming to access internal registers. 8689YUV7YUV4IYUV data bus for screen video port. 90VCCVoltage supply, 5V. 91VSSGround. 92YUV3IYUV data bus for screen video port. 93DSC D4I/OData for

37、programming to access internal registers. 94YUV2IYUV data bus for screen video port. 95DSC D3I/OData for programming to access internal registers. 96YUV1IYUV data bus for screen video port. 97DSC D2I/OData for programming to access internal registers. 98YUV0IYUV data bus for screen video port. 99DSC

38、 D1I/OData for programming to access internal registers. 100VSSGround. 7 CIRCUIT DESCRIPTION DPF-K6010V(K) COVER1,1( 98.12.10 10:54 yW 14 DPF-K6010V YUV(07) Misc. Controller PCLK AUX(07) DOE DBUS(015) DA(08) DRAM Decoder Processor 64x32 ROM Serial Audio interface TDM ATCLK LCS(0,1) LD(07) LA(017) RA

39、S Processor DRAM Interface Huffman interface DWE 2Kx32 ROMLWR LCS3, CAS RlSC LOE AUX 512x32 SRAM MPEG ACLK Screen Processor AIN AOUT Serial Audio Display PCLK2X SRAM32x32 interface ATFS ARFS Interface VSYNC HSYNC Video OutputARCLK On Screen Registers SEL PLL(1,0) CPUCLK Display TDMDR TOMCLK TDM Inte

40、rface RESET TDMFS DRAM DMA Video CD Companion Chip 256Kx16 NTSC/PAL Audio Microphone Panel Control/ Remote Interface Keypad Echo TDM CD ROM ES3210 DRAM Speakers Audio DRAM DAC Television Encoder Video : ROM VFD VFD Driver ES3209 Speakers Audio DAC Remote Receiver NTSC/PAL Video DSC ES3210 CD-ROM Tel

41、evision PLL Drive ROM 3D/Echo/Surround Pre-amp Volume Control Mic 1 Pre-ampPanel DRAM Volume Control Mic 2 8 CIRCUIT DESCRIPTION 3. ES3210 Video CD PC Block Diagram 4. ES3210 Video CD Processor Chip System Block Diagram 5. ES3209 Video CD Companion Chip System Block Diagram DPF-K6010V(K) COVER1,1( 9

42、8.12.10 10:54 yW 13 DPF-K6010V by any Interpolate YUV Previous frame or OSD data Remove noise amount Vertical scale up image quality Improve NoiseDRAM Reduction VerticalDe-blocking Frame (Luma) Interpolate Filter Buffer OSD Hardware Pixel Unit MPEG CoreMPEG Core Pixel Unit ColorHorizontal scale upYU

43、V 4:2:2Generate conversionby up to 4 times vertical onlyInterlaced fields Output Video RGB HorizontalUV VerticalInterlacing Bus Interpolate Filter 9 StepKey nameDisplayDescription 1SELECT 3 2 01 (1) Focus servo.ON TE-B adjustment(2) Tracking servo.OFF (3) Feed servo.OFF 2 02 (1) Focus servo.ON F-GAI

44、N/T-GAIN FE-B adjustment (2) Tracking servo.ON (3) Feed servo.ON 2DISPLAY Display(FL, LED) goes on. Display goes off. 3RETURN 7 OPEN Cancel the test mode. 8. Test mode 8-1. Setting the test mode The microprocessor built in the unit can be put to TEST MODE by just pressing the DISC 3 key when set to

45、power on. Press the DISPALY key. 8-2. Key vs Function in test mode CIRCUIT DESCRIPTION 6. Video Post-processing KS9 (23)KS8(22)KS7 (21)KS6 (20)KS5 (19)KS4 (18)KS3 (17)KS2 (16)KS1 (15) KEY1 (10)DISC1OPEN/CLOSESTOPPLAY+100 KEY2 (11)DISC2DISC SKIPREPEATPAUSE I369 KEY3 (12)DISC3DISPLAYPREV.NEXTAUDIO MOD

46、E258 KEY4 (13)PBCDIGESTRESUMESURROUND#147 7. Key matrix ( ) : IC2, IC port DPF-K6010V(K) COVER1,1( 98.12.10 10:54 yW 16 DPF-K6010V 10 ADJUSTMENT FIG. VC + _ L.P.F. + + L.P.F. VTVM VTVM 1 2 3 4 5 6 7 1.2 kHz 50 mVrms (a) No.ITEM INPUT SETTINGS OUTPUT SETTINGS ALIGNMENT POINTS ALIGN FORPLAYER SETTINGS 1 LASER POWER Apply the sensor section of optical power meter on the pickup lens. On the power from 0.05 t