Philips-DVDR-5520-H-5570-H-Service-Manual(1) 电路图 维修手册.pdf
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1、Published by KC-TE 0750 V HDD1008+ HDD Bracket 192+ screws 268+Suspension Bracket 194 + HDD Damper 196 for DVDR5570H) as shown in fi gure 11. Figure 11 Remove mounting screws for HDD 2) Flip over the HDD Assembly to see the mounting screws 268. Remove the screws 268 to dismantle the HDD 1003 from th
2、e HDD Assembly. Notes: Only the special type of screws as described in Service Parts List must be used for position number 268. Using improper screws may damage the mounting holes on the HDD. 4.7. Dismantling of HDMI Board and DTTM board 1) Remove 2 screws to loosen the HDMI Board 1004 form the Rear
3、 Plate 230. The mounting screws are shown in fi gure 10. Figure 12 Remove mounting screws for HDMI Board 2) The HDMI Board Service Position is shown in fi gure 11. Figure 13 HDMI Board Service Position. 3) Remove 2 screws to loosen the DTTM Board 1005 and DTTM Insulator Sheet 200 form the Rear Plate
4、 230. The mounting screws are shown in fi gure 14. Figure 14 DTTM Board mounting screws 4) Remove the DTTM Insulator Sheet 200 for DTTM Board Service Position. The DTTM Board Service Position is shown in fi gure 15. Figure 15 DTTM Board Service Position. (DTTM Insulator Sheet removed) Insulation She
5、et Insulation Sheet 4.Mechanical Instructions EN 173139 785 33220 4.8. Dismantling of IR Blaster Board (/05/31 only) 1) Remove the DTTM Board 1005, then remove the screw as shown in fi gure 16 dismantle the IR Blaster Board 1001-1024. Figure 16 IR Blaster Board mounting screw 4.9. Dismantling of Ana
6、log board 1) Remove the DTTM Board 1005, the HDMI Board1004, and IR Blaster Board 1001-1024 (/05/31 only). 2) Then remove 2 screws, detach the DTTM bracket 182 and remove 1 more screw from the Frame 160. Loosen 7 screws on the Rear Plate 230 to dismantle the Analog board. The mounting screws are sho
7、wn in fi gure 17 and fi gure 18. Analog Board Service Position is shown in fi gure 19. Figure 17 Mounting screws for Analog Board and DTTM bracket (HDMI Board and DTTM Board removed) Figure 18 Mounting screws on the Rear Plate Figure 19 Analog Board Service Position Insulation Sheet 4.Mechanical Ins
8、tructions EN 183139 785 33220Firmware Upgrading Wrong user input 40202 Address is not dividable by 4 Example DS: 402 0 xa1000010 0 xad112222 040200: Test OK EN 313139 785 332205.Firmware Upgrading Wrong user input 40302 Address is not dividable by 4 Example DS: 403 0 xa1000010 040300: Value read = 0
9、 xAD112222 Test OK Nucleus Name DS_SDRAM_DmaWriteRead Nucleus Number 404 Description Write a pattern to the entire RAM using DMA and check the data Technical - Check if the Stack pointer is not in the write range - Clear a 64kb block and then fill it with a pattern - Initialise the DMA controller an
10、d write the data to the SDRAM - Then check if all the data was written correctly (except descriptor tables) - Repeat the process 4 times with 4 different patterns Execution Time 24 seconds User Input None. Error Number Description 40400 Writing to the RAM succeeded 40401 Stack area definition ERROR!
11、 40402 DMA controller could not be initialised. 40403 Not all data was transferred correctly Example DS: 404 040400: Test OK EN 323139 785 33220Firmware Upgrading Wrong user input 50202 Address is not dividable by 4 Example DS: 502 0 xb8000000 050200: Value read = 0 x3C08A000 Test OK Nucleus Name DS
12、_FLASH_ChecksumProgram Nucleus Number 503 Description Check the checksum of the application partitions by recalculating and comparing partition checksums Technical - Determine the number of segments - Find the application in each segment and determine its checksum - Check whether the checksums store
13、d match the newly calculated Execution Time 6 seconds User Input None Error Number Description 50300 The checksum is valid, the test succeeded 50301 The checksum is invalid Example DS: 503 050300: BootCode checksum is: 0 xBABE5B6F, which is correct Diagnostics checksum is: 0 xBABEBAFF, which is corr
14、ect Download checksum is: 0 xBABEEDBF, which is correct Application checksum is: 0 xBABE8EEC, which is correct Test OK EN 333139 785 332205.Firmware Upgrading however, the SYSCLK output remains active. If the LPS input remains low for more than 26 s (1280 SYSCLK cycles), the PHY-LLC interface is put
15、 into a low-power disabled state in which the SYSCLK output is also held inactive. The PHY-LLC interface is placed into the disabled state upon hardware reset. The LLC is considered active only if both the LPS input is active and the LCtrl register bit is set to 1, and is considered inactive if eith
16、er the LPS input is inactive or the LCtrl register bit is cleared to 0. LREQ148CMOSILLC request input. The LLC uses this input to initiate a service request to the TSB41AB1. Bus holder is built into this terminal. PC0 PC1 PC2 20 21 22 16 17 18 CMOSIPower class programming inputs. On hardware reset,
17、these inputs set the default value of the power class indicated during self-ID. Programming is done by tying these terminals high or low. Refer to Table 9 for encoding. PD1412CMOSIPower-down input. A high on this terminal turns off all internal circuitry except the cable-active monitor circuits, whi
18、ch control the CNA output (64-terminal PAP package only). Asserting the PD input high also activates an internal pulldown on the RESET terminal to force a reset of the internal control logic. (PD is provided for legacy compatibility and is not recommended for power management in place of IEEE 1394a-
19、2000 suspend/resume LPS and C/LKON features.) EN 1743139 785 332208.IC Internal Block Diagrams TERMINAL TYPEI/ODESCRIPTION NAMEPAP NO.PHP NO. TYPEI/ODESCRIPTION PLLGND57, 5841SupplyPLL circuit ground terminals. These terminals should be tied together to the low-impedance circuit board ground plane.
20、PLLVDD5640SupplyPLL circuit power terminals. A combination of high-frequency decoupling capacitors near each terminal is suggested, such as paralleled 0.1 F and 0.001 F. Lower frequency 10 F filtering capacitors are also recommended. This supply terminal is separated from DVDD and AVDD inside the de
21、vice to provide noise isolation. It should be tied at a low-impedance point on the circuit board. R0 R1 40 41 33 34 BiasCurrent setting resistor terminals. These terminals are connected through an external resistor to set the internal operating currents and cable driver output currents. A resistance
22、 of 6.34 k 1.0% is required to meet the IEEE Std 1394-1995 output voltage limits. RESET5337CMOSILogic reset input. Asserting this terminal low resets the internal logic. An internal pullup resistor to VDD is provided so only an external delay capacitor is required for proper power-up operation (see
23、power-up reset in the Application Information section). The RESET terminal also incorporates an internal pulldown which is activated when the PD input is asserted high. This input is otherwise a standard logic input, and may also be driven by an open-drain type driver. SE2823CMOSITest control input.
24、 This input is used in manufacturing test of the TSB41AB1. For normal use this terminal may be tied to GND through a 1-k pulldown resistor or it may be tied to GND directly. SM2924CMOSITest control input. This input is used in manufacturing test of the TSB41AB1. For normal use this terminal should b
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