Philips-MCV-65-Service-Manual(1) 电路图 维修手册.pdf

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1、 MC-V65/21M/33 3140 785 32160 Service ManualService Manual Micro System VIDEO CD Published by SL 0232 Service Audio Printed in The Netherlands Subject to modification Copyright 2001 Philips Consumer Electronics B.V. Eindhoven, The Netherlands All rights reserved. No part of this publication may be r

2、eproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips. Handling chip components .1-1 Technical specification.2-1 Service tools.2-1 Service measurement setup.2-2 Connections and c

3、ontrols.3-1.3-2 Disassembly diagram .4-1 Pin description of ICs.4-2.4-10 Set block diagram.5-1 Set wiring diagram.5-2 LED BOARD circuit diagram .6-1 layout diagram.6-1 POWER BOARD circuit diagram .7-1 layout diagram.7-1 HEADPHONE BOARD circuit diagram .7-1 layout diagram.7-1 VCD If your system is eq

4、uipped with a Voltage Selector, set the VOLTAGE SELECTOR to the local power line voltage. All other connections have been made. WARNING! For optimal performance, use only the original power cable. Never make or change connections with the power switched on. BAntennas Connection Connect the supplied

5、AM loop antenna and FM antenna to the respective terminals. Adjust the position of the antenna for optimal reception. AMAntenna Position the antenna as far as possible from a TV, VCR or other radiation source. FM Antenna For better FM stereo reception, connect an outdoor FM antenna to the FM AERIAL

6、terminal. VOLTAGE SELECTOR 110V- 127V 220V- 240V AM aerial 3 - 2 CS xx xxx CONNECTION AND CONTROLS 1234 5678 90+10 STANDBYNTSC/PALOSDSOURCE SLEEPBANDTIMERMUTE REPEATSHUFFLEDBBDSC REWPREVNEXTFWD PBCRETURNA-BSLOW VOCAL ECHO KEYVIEW GO TO RESUME PLAY/PAUSE STOP VOLVOL 4 # * 1 ( ) 2 ! 0 3 # 2 RESUME to

7、continue playback again from where you have stopped (for VCD with PBC switched off). VCD operations (on remote control only) PBC to switch on or off the playback control mode (for VCD version 2.0 only). RETURN to return to the previous menu level during playback (for VCD with PBC switched on). A - B

8、 to playback a certain scene or passage of a CD/VCD repeatedly. SLOW to watch the VCD at a slower speed. VIEW to scan through a VCD or a specific track (for VCD with PBC switched off) KEY to display and set the key tone level. ECHO to adjust the echo level for karaoke after inserted the microphone.

9、VOCAL to fade out the original vocal from a Karaoke VCD or to switch between mono or stereo mode during audio disc playback. PREV / NEXT for CD/VCD/MP3-CDto select a desired track. for Tuner . to select a preset radio station. for Clock . to set the hours and minutes. GOTO to playback at any chosen

10、time on the CD/VCD. TIMER to activate the timer/clock function. MUTE to enable or disable the sound output. OSD to switch on or off the On Screen Display on the TV. Controls Notes for remote control: While the system is in active mode, select the source you wish to control by pressing SOURCE key on

11、the remote control. Then select the desired function (for example,). Preparations AM aerial AUX In RIGHTLEFT RLspeaker (right) speaker (left) A B C AC power cord FM wire antenna AM loop antenna 3 FM aerial 75 VOLTAGE SELECTOR 110V- 127V 220V- 240V VOLTAGE SELECTOR 220V- 240V VIDEO OUT D VIDEO IN Tel

12、evision L R AUDIO OUT E 110V- 127V Rear connections The type plate is located at the rear of the system. APower Before connecting the AC power cord to the wall outlet, ensure that the following are done; If your system is equipped with a Voltage Selector, set the VOLTAGE SELECTOR to the local power

13、line voltage. All other connections have been made. WARNING! For optimal performance, use only the original power cable. Never make or change connections with the power switched on. BAntennas Connection Connect the supplied AM loop antenna and FM antenna to the respective terminals. Adjust the posit

14、ion of the antenna for optimal reception. AMAntenna Position the antenna as far as possible from a TV, VCR or other radiation source. FM Antenna For better FM stereo reception, connect an outdoor FM antenna to the FM AERIAL terminal. VOLTAGE SELECTOR 110V- 127V 220V- 240V AM aerial 3 - 3 Preparation

15、s CSpeakers Connection Front Speakers Connect the speaker wires to the SPEAKERS terminals, right speaker to RIGHT and left speaker to LEFT, coloured (marked) wire to + and black (unmarked) wire to -. 1 2 Fully insert the stripped portion of the speaker wire into the terminal as shown. Notes: For opt

16、imal sound performance, use the supplied speakers. Do not connect more than one speaker to any one pair of +/- speaker terminals. Do not connect speakers with an impedance lower than the speakers supplied. Please refer to the SPECIFICATIONS section of this manual. DConnecting a TV Connect the VIDEO

17、OUT terminal at the rear of the system to the TV or VCR VIDEO IN for viewing or recording. Note: To avoid magnetic interference, do not position the front speakers too close to your TV. EConnecting other equipment to your system Use a cinch cable to connect AUX IN to the analogue audio out terminals

18、 of an external equipment (TV, VCR, Laser Disc player, DVD player or CD Recorder). Note: If you are connecting to equipment with only mono output (a single audio out terminal), connect it to the AUX IN left terminal. Alternatively, you can use a “single to double” cinch cable, but the output sounds

19、still remain mono. Inserting batteries into the remote control Insert two batteries type R03 or AAA (not supplied) into the remote control with the correct polarity as indicated by the + and - symbols inside the battery compartment. CAUTION! Remove batteries if they are exhausted or will not be used

20、 for a long time. Do not use old and new or different types of batteries in combination. Batteries contain chemical substances , so they should be disposed off properly. CONNECTION AND CONTROLS For more information on operation instruction please visit Philips Audio internet site : 4 - 14 - 1 A. To

21、remove Cabinet Rear B. To remove CD Tray C. To remove Main Board D. To remove VCD this pin should be tied LOW CL162616.9344 MHz system clock output DATA27serial d4(1)ata output (3-state) WCLK28word clock output (3-state) SCLK29serial bit clock output (3-state) EF30C2 error flag output (3-state) TEST

22、231test control input 2; this pin should be tied LOW KILL32kill output (programmable; open-drain) VSSD133(1)digital ground 2 V2/V334versatile I/O: input versatile pin 2 or output versatile pin 3 (open-drain) WCLI35word clock iutput (for data loopback to DAC) SDI36serial data input (for data loopback

23、 to DAC) SCLI37serial bit clock input (for data loopback to DAC) RESET38power-on reset input (active LOW) SDA39microcontroller interface data I/O line (open-drain output) SCL40microcontroller interface clock line input Abbreviations and Pin-description of CD Ics SERVO PROCESSOR SAA7324H SYMBOLPINDES

24、CRIPTION RAB41microcontroller interface R/W and load control line input (4-wire bus mode) SILD42microcontroller interface R/W and load control line input (4-wire bus mode) STATUS43servo interrupt request line/decoder status register output (open-drain) TEST344test control input 3; this pin should be

25、 tied LOW RCK45subcode clock input SUB46P-to-W subcode bits output (3-state) SFSY47subcode frame sync output (3-state) SBSY48subcode block sync output (3-state) CL11/44911.2896 MHz or 4.2336 MHz (for microcontroller) clock output VSSD250(1)digital ground 3 DOBM51bi-phase mark output (externally buff

26、ered; 3-state) VDDD1(P)52(1)digital supply voltage 2 for periphery CFLG53correction flag output (open-drain) RA54radial actuator output FO55focus actuator output SL56sledge control output VDDD2(C)57(1)digital supply voltage 3 for core VSSD358(1)digital ground 4 MOTO159motor output 1; versatile (3-st

27、ate) MOTO260motor output 2; versatile (3-state) V461versatile output pin 4 V562versatile output pin 5 V163versatile intput pin 1 LDON64laser drive on output (open-drain) Note : All supply pins must be connected to the same external power supply voltage. 4 - 34 - 3 BLOCK DIAGRAM OF INTEGRATED CIRCUIT

28、 SERVO PROCESSOR SAA7324H 23 19 18 21 20 EFM DEMODULATOR MICROCONTROLLER INTERFACE CONTROL PART Vref GENERATOR VRIN ADC PRE- PROCESSING CONTROL FUNCTION OUTPUT STAGES R1 R2 12 D1D2D3D4 SCL SDA FRONT END HFIN HFREF ISLICE Iref 13 7 40 39 2 1 3 6 TEST TEST1 25 TEST2 31 TEST3 44 TIMING SELPLL 24 CRIN 1

29、6 CROUT 15 CL16 26 CL11/4 49 891 0 VSSA1 VSSA2 VDDA1 VDDA2 VSSD1VSSD3 VSSD2 VDDD1(P)VDDD2(C) 4145173350585257 RA FO SL 54 55 56 LDON 64 DIGITAL PLL SRAM RAM ADDRESSER SUBCODE PROCESSOR SBSY 48 SFSY 47 SUB 46 RCK 45 STATUS 43 DECODER MICRO- CONTROLLER INTERFACE RESET 38 VERSATILE PINS INTERFACE KILL

30、BITSTREAM DAC RP RN 22 LP LN Vpos Vneg 36 SDI 35 WCLI 37 SCLI SERIAL DATA (LOOPBACK) INTERFACE 30 EF 27 DATA 28 WCLK 29 SCLK SERIAL DATA INTERFACE PEAK DETECT EBU INTERFACE AUDIO PROCESSOR ERROR CORRECTOR FLAGS MOTOR CONTROL 51 DOBM 53 CFLG MOTO1 59 MOTO2 60 V1 V2/ V3 V4V5KILL 6334616232 SILD 42 RAB

31、 41 11 BLOCK DIAGRAM OF INTEGRATED CIRCUIT MM1469XH BLOCK DIAGRAM OF INTEGRATED CIRCUIT DIGITAL VIDEO ENCODER SPCA711A Latch 2 x Upsample Mod. and Mixer 1.3MHz LPF Internal VREF DAC DAC CLK P7:0 HSYNC* VSYNC* MODE3:0MASTERCBSWAPSVIDEOSLEEP VBIASVREFOUTFSADJUST COMP VRDAC CVBS/Y CVBS/C 9 9 5 6 7 8 9

32、10 11 12 13 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 14 15 16 17 18 19 20 FSADJUST COMP VAA VREFOUT VREFIN VBIAS CVBSC AGND SLEEP CLKOUT DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 CVBSY AGND TEST HSYNC VSYNC VDD DGND SVIDEO CBSWAP MASTER MODEA MODEB CLK XTALO 4 - 44 - 4 BLOCK DIAGRAM OF INTE

33、GRATED CIRCUIT TZA1024 PINS DESCRIPTION OF IC TZA1024 PIN FUNCTION PIN0UT MAP OF SPCA711A 4 - 54 - 5 PINS DESCRIPTION OF DIGITAL VIDEO ENCODER SPCA711A PIN FUNCTION MnemonicPIN No.TypeDescription DATA7:021 - 28IYCrCb pixel inputs. They are latched on the rising edge of CLK. YCrCb input data conform

34、to CCIR 601. CLKOUT29OPixel clock output VSYNC32I/OVertical sync input/output. VSYNC is latched/output following the rising edge of CLK. HSYNC1I/OHorizontal sync input/output. HSYNC is latched/output following the rising edge of CLK. MASTER16IMaster/slave mode selection. A logical high for master mo

35、de operation. A logical 0 for slave mode operation. CBSWAP15ICr and Cb pixel sequence configuration pin. A logic high swap the Cr and Cb sequence. SVIDEO14ISVIDEO select input pin. A logic high selects Y/C output. A logic low selects composite video output. SLEEP13IPower save mode. A logic high on t

36、his pin puts the chip into power- down mode. This pin is equal to reset pin. An external logic high pulse should input to the pin when power on. MODEA17IMode configuration pin. MODEB18IMode configuration pin. CLK19I27MHz crystal oscillator input. A crystal with 27MHz clock frequency can be connected

37、 between this pin and XTALO. XTALO20OCrystal oscillator output. TEST2ITest pin. These pins must be connected to DGND. VREFIN9IVoltage reference input. An external voltage reference must supply typical 1.235V to this pin. A 0.1F ceramic capacitor must be used to de-couple this input to GND. The decou

38、pling capacitor must be as closed as possible to minimize the length of the load. This pin may be connected directly to VREFOUT. VREFOUT8OVoltage reference output. It generates typical 1.2V voltage reference and may be used to drive VREFIN pin directly. FSADJ5-Full-Scale adjust control pin. The Full

39、-Scale current of D/A converters can be adjusted by connecting a resistor (RSET) between this pin and ground. MnemonicPIN No.TypeDescription VAA7-Analog power pin AGND3,12-Analog ground pin COMP6-Compensation pin. A 0.1F ceramic capacitor must be used to bypass this pin to VAA. The lead length must

40、be kept as short as possible to avoid noise. VBIAS10-DAC bias voltage. Potential normally 0.7V less than COMP. VDD31-Digital power pin DGND30-Digital ground pin CVBSY4OComposite/Luminance output. This is a high-impedance current source output. The output format can be selected by the PAL pin. The CV

41、BSY can drive a 37.5 ? load. CVBSC11OComposite/Chroma output. This is a high impedance current source Output. The output format can be selected by the PAL pin. The pin can drive a 37.5 ? load. PINS DESCRIPTION OF DIGITAL VIDEO ENCODER SPCA711A PIN FUNCTION 4 - 64 - 6 DRAM Interface Video Interface M

42、PEG1 Video Decoder PCM Interface KaraOk when in VCD mode, this pin follows the LSB of the emphasis field of the MPEG-1 audio header. HSYNC_IN Horizontal sync signal input from TV encoder. VSYNC_IN Vertical sync signal input from TV encoder. DATA_TV(7:0) These pins form the video data output bus. It

43、contains multiplexed Luminance and Chrominance video data. PAL_NTSC This pin controls the PAL/NTSC mode of TV encoder. CLK27OUT27 MHz video pixel clock output to the TV encoder. DA(11:0) Address bus of fast-page or EDO DRAM DD(15:0) DRAM access data bus. The direction is determined by DR_WE_L signal

44、. CAS_BDRAM CAS signals. RAS_BDRAM RAS signals for bank 1 to 0. WE_BDRAM write enable signal. NDATA(7:0)Bus interface between host and Mpeg chip. NSTROBE Strobe signal for other host interface signals NWRITE write/read enable AUD_XCK When the CA700A is programmed for external audio clock mode, the a

45、udio clock will come from this signal. When programmed for internal audio clock, this signal will reflect the internal audio clock. AUD_BCK This pin is the audio bit clock output. Depending on audio output mode, this signal can be derived from the master clock or be AUD_XCK divided by 8. It can be e

46、ither 48 or 32 times the sampling clock. AUD_LRCK This pin is used as the Left/Right data channel indicator.O O O O O O O Name I/O PinDescription I I I I I I I O O O This pin supplies 5 volts to I/O pad. GND5OP Ground for I/O buffers. I/O I I I I I I I O I I I/O I/O I/O 3,29,42,58,79,107 6,31,44,60,80,109 34,46,68,104,127 35,70,128 7 9 97 99 4-5 8 10 103 101 100 86 87 96-89 98 88 81 85 84