Onkyo-PRSC886-avc-sm 电路图 维修手册.pdf

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1、PR-SC886 SERVICE MANUAL Ref. No. 4102 092008 MODEL PR-SC886 RC-690M SAFETY-RELATED COMPONENT WARNING! COMPONENTS IDENTIFIED BY MARK ON THE SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK. REPLACE THESE COMPONENTS WITH ONKYO PARTS WHOSE PART NUMBERS APPEAR AS

2、SHOWN IN THIS MANUAL. MAKE LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY INSULATED FROM THE SUPPLY CIRCUIT BEFORE RETURNING THE APPLIANCE TO THE CUSTOMER. AV CONTROLLER INPUT SELECTOR LISTENING MODE ONSTANDBY GNITUMYALPSID RC-690M G U I D E E X I T PREV CH

3、 DIMMER CDR/MD SATTAPE/AMP SLEEP MACRO REMOTE MODE SUBTITLEAUDIOREPEATPLAY MODE -/-10 1112 VIDEO OFFOPEN/CLOSE TV TV CH TV VOL PLAYLISTRANDOM DVD AUX1AUX2GAME/TV CBL/SATVCR/DVR D. TUN CDTUNERTAPE PHONO VCRVCRDVDDVDHDDHDD S. RESTORE REC ENTER TEST TONE AUDIO SEL CH SEL SURR DIRECTTHXPURE A STEREO LEV

4、EL+LEVEL- L NIGHT ALL ST T O P M E N U M E N U VOL CH DISC ALBUM TV VCR CABLEDOCK DVD RECEIVER CD + - 123ZONE3 ZONE2 INPUT + - +100CLEAR 123 456 789 S E T U P R E T U R N Re-EQ AV CONTROLLERPR-SC886 Black model 120V AC, 60HzB MDD 220V240V AC, 50HzB MMP RadioFans.CN 收音机爱 好者资料库 EXPLODED VIEW PR-SC886

5、PR-SC886 MP Type P101 U017 MP Type A315 P9008 U28 A321 x 2 pcs. A070 x 4 pcs. A067 x 4 pcs. A085 x 2 pcs. A170 x 2 pcs. A085 x 2 pcs. A114 x 6 pcs. A112 x 3 pcs. A085 x 2 pcs. A085 x 5 pcs. U12 P102 A108 x 6 pcs. A056 x 10 pcs. A068 x 4 pcs. A112 x 4 pcs. A112 x 5 pcs. A120 x 4 pcs. A089 A114 x 2 pc

6、s. A112 x 71 pcs. A094 x 2 pcs. A078 x 3 pcs. A076 x 2 pcs. A109 x 4 pcs. A066 A084 A084 A400 A089 A072 A411 F9000 A410 A086 A172 A107 A087 A104 A090 A100 U05 A106 A110 P101 P2801 A089 A089 A087 F2501 F5000 F5001 F5002 F5003 F2502 U07 U27 U14 P205 U01 U04 U16 U13 U15 A085 T905 T903 T904 A111 A132 A1

7、28 A067 U25 U06 U20 U26 U08 U10 U09 A058 U02 U03 F9301 A116 A118A113 A092 A098 A096 A085 x 3 pcs. A085 x 2 pcs. A085 x 15 pcs. A085 x 2 pcs. A142 x 2 pcs. A112 x 8 pcs. A112 x 2 pcs. A112 x 2 pcs. A070 x 3 pcs. A137 A137 A270 A205 A219A239 A223 A085 A085 A221 A209 A211 A213 A215 A303 A311 A313 A207

8、A217 A201 A261 A085 A253 A251 A255 A301 A259 A281 P7501 U17 U21 U24 U22 U18 A085 x 2 pcs. U19U23 DD Type DD Type A069 x 4 pcs. RadioFans.CN 收音机爱 好者资料库 BLOCK DIAGRAMS-1 AUDIO SECTION PR-SC886 A 1 2 3 4 5 BCDEFGH Audio Muting SPDIF RX0 RX5 MCH SR RX6 RX7 DAC_FL DAC_SL DAC_SR DAC_SBR DAC_SBL V_OUT_L V_

9、OUT_R DAC_FR DAC FL MIX L MIX R DAC FR DAC_CT DAC_SW MCH C DAC C MCH SW DAC SW MCH SL MAIN L MAIN R DAC SL DAC CT2 DAC SW2 MCH_SBR MCH_SBL MCH_SR MCH_SL MCH_SW MCH_CT VCR/DVR OUT TAPE OUT TAPE VCR/DVR IN CBL/SAT GAME/TV DVD OUT MAIN,SUB IN 1-4 ch6 ch4 ch13 RS232 RS232 Q3031 ICL3221E RI RI INTERFACE

10、OPTICAL IN 1 DIGITAL IN (FRONT) COAX IN 2 COAX IN 1 HDMI C SBL HDMI I/F FLASH ROM SD_RAM I2S DSD FL FR SL SR +20dB SW2 I2S I2S DSD PHONO OPTICAL IN 2 SBR L FRONT SURROUND SURROUND BACK R SUBWOOFER CENTER L R L R PRE OUT BALANCE PRE OUT BALANCE INPUT CD DD Type Only TUNER UNIT HD RADIO: DD Type only

11、AM LOOP ANTENNA FM ANTENNA SW R L R L ZONE2 PRE OUT/LINE OUT TONE Q4204 R2S15211FP 0dB FIX ZONE3 PRE OUT/LINE OUT -6dB -6dB Q3041 CS42516 MAIN B Z2 Z3 C2 R L FL FR C SW SL SR SBL SBR FL BALANCE TERMINAL BOARD NATRM-9108 SD-18 FR C SW SL SR SBL SBR FRONT L FRONT R L R L R CENTER SW SURROUND L SURROUN

12、D R SURROUND BACK L SURROUND BACK R HEADPHONES (DVD audio,etc) 0dB 0dB-6dB -6dB Q4405 CS3318 AUX 2 IN (FRONT) AUX 1 Q4029 TC94A46CFG ch14 ch12 ch11 ch10 ch9 ch8 ch1 ch2 RIAA XM Sirrus MAIN A DIR TONE 0dB FIX Q4305 NJU7313A Analog Switch ch5 ch7 ch3 Q4304 NJU7312A Q4304 NJU7312A Analog Switch 0dB FIX

13、 0dB FIX SETUP MIC OPTICAL OUT . COAX IN 3 MULTI CHANNEL INPUT FL FR C SW SL SR SBL SBR LR L R L R L R L R L R L R L R L R L R L R PCM1796 2ch DAC2ch DAC2ch DAC2ch DAC2ch DAC PCM1796 Q3701Q3721Q3741Q3761Q3781 PCM1796PCM1796PCM1796 TC74VHC157FTMULTIPLEXER . . . . I2S/DSD MULTIPLEXER TC74VHC157FT Q300

14、1 TC74VHC157FT Refer to SCHEMATIC DIAGRAM-5 and -19 (SD-5 and SD-19) for digital audio signal flow waveforms. +6dB VLSC +6dB VLSC +6dB VLSC +6dB VLSC +6dB VLSC +6dB VLSC +6dB VLSC +6dB VLSC +6dB VLSC +6dB VLSC SW SW IR OUT IR IR IN B IR IN A 12V TRIGGER OUT B 12V TRIGGER CONTROL REMOTE SENSOR 12V TR

15、IGGER OUT A 12V TRIGGER OUT C INTERFACE MAIN MICROPROCESSOR Q7001 M3087BFLBGP NALAN-9079 SD-17 E-CONTROL BOARD ETHERNET (E-CONTROL) DSP BLOCK SD-6 and 7 2nd DSP Q3501: TMS320D788E001BRFP266 (SD-11) 1st DSP Q3401: TMS320D790E001BZDH300 (SD-10) 3rd DSP Q3601: TMS320D707E001BRFP250 (SD-11) HDMI BOARD N

16、AHDM-9114 SD-11 to 15 NAVD-9052 SD-3 NADG-9074 SD-5 Q4306 NJU7311A Q4305 NJU7313A Video REC Analog Switch Analog Switch Audio Selector, Volume, Tone Analog Switch Array Analog SwitchVolume ADC RadioFans.CN 收音机爱 好者资料库 BLOCK DIAGRAMS-2 VIDEO SECTION PR-SC886 A 1 2 3 4 5 BCDEFGH Video Signal Flow Analo

17、g Analog (Through Mode) HDMI HDMI (Through Mode) HDMI HDMI Analog HDMI 1 4 3 2 Analog example is Component Video except OSD HDMI Analog Analog (Up-conversion) OSD Analog 5 Composite Composite 6 8 8 7 CBL/SAT VCR/DVR AUX 1 DVD GAME/TV MONITOR OUT VCR/DVR OUT MONITOR OUT VCR/DVR OUT ZONE2 OUT AUX 2 (F

18、RONT) CBL/SAT VCR/DVR AUX 1 DVD GAME/TV AUX 2 (FRONT) C YC YC YC YC YC Y CB1 CR1 Y2 CB2 CR2 CR3 Y3 CB3 Y1 IN 1 IN 2 IN 3 Y CB CR C CB CR Y Y CB CR CVBS Y C HDBSC Y CVBS HDBPY HDBPB HDBPB 24MHz MAX HDMI BOARD (NAHDM-9114, SD-11 to 15) VIDEO BOARD (NAVD-9052, SD-3) CY CY HDBCV 12MHz MAX HDBSY MONITOR

19、OUT C-DET MAIN MAIN Z2 Z2 NOTE MMP is short for MAIN MICROPROCESSOR. S-DET Z2 S-DET LPF(12MHz) LPF(12MHz) LPF(12MHz) LPF(6MHz) Y CB CR MAIN Z2 Q2201 NJW1321FP1 VMUT Q2012,Q2013 NJM2587V Q2012,Q2013 NJM2587V Q2014 MM1512 BPF(140K-6MHz) LPF(6MHz) HDAPY HDAPB HDAPR HDACV HDASC HDASY Q2206 NJM2586AM 100

20、MHz -3dB LPF(12MHz) LPF(12MHz) LPF(6MHz) LPF(6MHz) LPF(12MHz) BPF(140K-6MHz) 6dBDRV DRV MMP 6dBDRV 6dBDRV 6dBDRV DRV6dB 6dBDRV 6dB 6dB 6dB 6dB 6dB 6dB 6dB 6dB 6dB 6dBDRV 6dBDRV 75 75 75 75 75 75 6dBDRV 6dBDRV 6dBDRV 6dBDRV 6dB MMP MMP MMP S VIDEO INPUT COMPOSITE VIDEO COMPONENT VIDEOVideo Switch Vid

21、eo Amp Y/C Mix Video Amp Video Amp Q2027 NJU7312AM VCL VDATA VSTB Analog switch MMP S VIDEO OUTPUT COMPOSITE VIDEO COMPOSITE VIDEO COMPONENT VIDEO MONITOR OUT 2 / ZONE 2 OUT MMP Y CB CR VMUT Q2207 NJM2586A 100MHz -3dB 6dB 6dB 6dB Q2006-2011 74HC4051 Refer to SCHEMATIC DIAGRAM-3, 13, 14 and 19 (SD-3,

22、 SD-13, SD-14 and SD-19) for video and HDMI signal waveforms. BLOCK DIAGRAMS-3 HDMI SECTION PR-SC886 A 1 2 3 4 5 BCDEFGH Video Signal Flow Analog Analog (Through Mode) HDMI HDMI (Through Mode) HDMI HDMI Analog HDMI 1 4 3 3 2 2 Analog examples are Component Video except OSD HDMI Analog Analog (Up-con

23、version) OSD Analog 5 Composite Composite 6 8 8 8 7 OSD 32 HDASY HDAPR HDAPB HDAPY HDACV HDASC SDA_VDVE SCL_VDVE INT_VD VD_RST OERX VDOFF HDBSY HDBCV HDBSC HDBPR HDBPB HDBPY SCL_VDVE RST_VE SDA_VDVE OEDECTH VSYNC HSYNC FIELD/DE Y(P10-19)ITU656 Up-covert route from S-Video otherwise, this pin is a CM

24、OS output. IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -15 Q3401, Q3501: D790E001BZDH300 (Audio DSP) BLOCK DIAGRAM TX-SR876/SA876 System Diagram Device Block Diagram Program/Data RAM 256K Bytes 256 256 Program/Data ROM Page1 256K Bytes 256 256 256K Bytes ROM Page3 Program/Data Program/Data ROM Page2

25、 256K Bytes 3232 DMPPMP CSP32 256 Program Cache 32K Bytes 64 D1 Data R/W R/W Data D2 64 256 Program FetchINTI/O C67x+ CPU Memory Controller 32 High-Performance Crossbar Switch 32 McASP DMA Bus JTAG EMU 32 32 32 32 32 32 32 32 Peripheral Configuration Bus EMIF 32 Events In 32 MAX1MAX0 32 CONTROL 32 I

26、nterrupts Out I/O dMAX McASP0 16 Serializers McASP1 6 Serializers McASP2 2 Serializers + DIT SPI1 SPI0 I2C1 I2C0 RTI32 UHPI PLL Peripheral Interrupt and DMA Events 32 32 32 32 32 256K Bytes RAM Bytes ROM 768K Memory Controller C67x+ DSP Core Program Cache Crossbar Switch EMIFUHPIdMAX McASP0 SPI1 McA

27、SP1 I2C0 I2C1 RTI SPIO McASP2 PLLOSC ASYNC FLASH 100-MHz/ 133-MHz SDRAM DSP Host Microprocessor Audio Zone 1 SPI or I2C Control (optional) Audio Zone 2 Audio Zone 3 CODEC, DIR, ADC, DAC, DSD, Network Network ADC, DAC, DSD, CODEC, DIR, TDM Port Digital Out, High Speed Parallel Data DSP Control SPI or

28、 I2C 6 Independent Audio Zones (3 TX + 3 RX) 16 Serial Data Pins PIN CONFIGURATION(1/2) IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -16 Q3401, Q3501: D790E001BZDH300 (Audio DSP) TX-SR876/SA876 PIN MAP PIN CONFIGURATION(2/2) IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -17 Q3401, Q3501: D790E001BZDH30

29、0 (Audio DSP) TX-SR876/SA876 Bottom View 13 24 5 68 79 10 11 14 15 12 13 16 N A C B D F E L G H J K M P T R TERMINAL DESCRIPTION(1/5) BALL SIGNAL NAMETYPE(1)PULL(2)GPIO(3)DESCRIPTION NO. Clocks OSCINJ2I-N1.2-V Oscillator Input OSCOUTJ3O-N1.2-V Oscillator Output OSCVDDJ4PWR-NOscillator 1.2-V VDDtap p

30、oint (for filter only) OSCVSSJ1PWR-NOscillator VSStap point (for filter only) CLKINH2I-NAlternate clock input (3.3-V LVCMOS Input) PLLHVK2PWR-NPLL 3.3-V Supply Input (requires external filter) Device Reset RESETG2I-NDevice reset pin Emulation/JTAG Port TCKP1IIPUNTest Clock TMSK3IIPUNTest Mode Select

31、 TDIL1IIPUNTest Data In TDOM2OZIPUNTest Data Out TRSTK4IIPDNTest Reset EMU0M1IOIPUNEmulation Pin 0 EMU1N1IOIPUNEmulation Pin 1 Power Pins Core Supply (CVDD)E6, E7, E8, E9, E10, E11, G5, G12, H5, H12, J5, J12, K5, K12, M6, M7, M8, M9, M10, M11 IO Supply (DVDD)A2, A15, B1, B16, D4, D5, D12, D13, E4, E

32、13, J14, M4, M13, N5, N12, P8, R1, R16, T2, T15 A1, A7, A10, A16, E5, E12, F5, F6, F7, F8, F9, F10, F11, F12, G1, G6, G7, G8, G9, G10, G11, G16, H3, Ground (VSS)H6, H7, H8, H9, H10, H11, J6, J7, J8, J9, J10, J11, K1, K6, K7, K8, K9, K10, K11, K16, L5, L6, L7, L8, L9, L10, L11, L12, M5, M12, T1, T7,

33、T10, T16 A TERMINAL DESCRIPTION(2/5) IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -18 Q3401, Q3501: D790E001BZDH300 (Audio DSP) TX-SR876/SA876 BALL SIGNAL NAMETYPE(1)PULL(2)GPIO(3)DESCRIPTION NO. External Memory Interface (EMIF) Address and Control EM_A0J16O-N EM_A1J15O-N EM_A2K15O-N EM_A3L16O-N EM_A

34、4L15O-N EM_A5M16O-N EM_A6M15O-NEMIF Address Bus EM_A7N16O-N EM_A8N15O-N EM_A9P16O-N EM_A10H15O-N EM_A11P15O-N EM_A12P12OIPDN EM_BA0G15O-N SDRAM Bank Address and Asynchronous Memory Low-Order Address EM_BA1H16O-N EM_CS0F15O-NSDRAM Chip Select EM_CS2E15O-NAsynchronous Memory Chip Select EM_CASR3O-NSDR

35、AM Column Address Strobe EM_RASF16O-NSDRAM Row Address Strobe EM_WET3O-NSDRAM Write Enable EM_CKET14O-NSDRAM Clock Enable EM_CLKR14O-NSDRAM Clock EM_WE_DQM0R4O-NWrite Enable or Byte Enable for EM_D7:0 EM_WE_DQM1T13O-NWrite Enable or Byte Enable for EM_D15:8 EM_WE_DQM2P13OIPUNWrite Enable or Byte Ena

36、ble for EM_D23:16 EM_WE_DQM3R15OIPUNWrite Enable or Byte Enable for EM_D31:24 EM_OED15O-NSDRAM Output Enable EM_RWE16O-NAsynchronous Memory Read/not Write Asynchronous Wait Input (Programmable Polarity) or EM_WAITD14IIPUN Interrupt (NAND) (1)TYPE column refers to pin direction in functional mode. If

37、 a pin has more than one function with different directions, the functions are separated with a slash (/). (2)PULL column: IPD = Internal Pulldown resistor IPU = Internal Pullup resistor (3)If the GPIO column is Y, then in GPIO mode, the pin is configurable as an IO unless otherwise marked. A TERMIN

38、AL DESCRIPTION(3/5) IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -19 Q3401, Q3501: D790E001BZDH300 (Audio DSP) TX-SR876/SA876 BALL SIGNAL NAMETYPE(1)PULL(2)GPIO(3)DESCRIPTION NO. External Memory Interface (EMIF) Data Bus / Universal Host-Port Interface (UHPI) Address Bus Option EM_D0T8IO-N EM_D1R8IO-

39、N EM_D2R7IO-N EM_D3T6IO-N EM_D4R6IO-N EM_D5T5IO-N EM_D6R5IO-N EM_D7T4IO-N EMIF Data Bus Lower 16 Bits EM_D8R13IO-N EM_D9T12IO-N EM_D10R12IO-N EM_D11T11IO-N EM_D12R11IO-N EM_D13R10IO-N EM_D14T9IO-N EM_D15R9IO-N EM_D16/UHPI_HA0N7IO/IIPDN EM_D17/UHPI_HA1P6IO/IIPDN EM_D18/UHPI_HA2N6IO/IIPDN EM_D19/UHPI_

40、HA3P5IO/IIPDN EM_D20/UHPI_HA4P4IO/IIPDN EM_D21/UHPI_HA5P3IO/IIPDN EM_D22/UHPI_HA6N4IO/IIPDN EM_D23/UHPI_HA7R2IO/IIPDN EMIF Data Bus Upper 16 Bits (IO) or UHPI Address Input (I) EM_D24/UHPI_HA8P11IO/IIPDN EM_D25/UHPI_HA9N11IO/IIPDN EM_D26/UHPI_HA10P10IO/IIPDN EM_D27/UHPI_HA11N10IO/IIPDN EM_D28/UHPI_H

41、A12P9IO/IIPDN EM_D29/UHPI_HA13N9IO/IIPDN EM_D30/UHPI_HA14N8IO/IIPDN EM_D31/UHPI_HA15P7IO/IIPDN A TERMINAL DESCRIPTION(4/5) IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -20 Q3401, Q3501: D790E001BZDH300 (Audio DSP) TX-SR876/SA876 BALL SIGNAL NAMETYPE(1)PULL(2)GPIO(3)DESCRIPTION NO. Universal Host-Port

42、 Interface (UHPI) Data and Control UHPI_HD0K13IOIPDY UHPI_HD1K14IOIPDY UHPI_HD2M14IOIPDY UHPI_HD3L13IOIPDY UHPI_HD4L14IOIPDY UHPI_HD5N13IOIPDY UHPI_HD6N14IOIPDY UHPI_HD7P14IOIPDY UHPI Data Bus Lower 16 Bits UHPI_HD8E14IOIPDY UHPI_HD9F14IOIPDY UHPI_HD10F13IOIPDY UHPI_HD11G14IOIPDY UHPI_HD12G13IOIPDY

43、UHPI_HD13H14IOIPDY UHPI_HD14H13IOIPDY UHPI_HD15J13IOIPDY UHPI_HD16/HHWILH1IO/IIPDY UHPI_HD17G3IOIPDY UHPI_HD18G4IOIPDY UHPI_HD19F3IOIPDY UHPI_HD20F4IOIPDY UHPI Data Bus Upper 16 Bits (IO) in the following modes: UHPI_HD21E3IOIPDY Fullword Multiplexed Address and Data UHPI_HD22D3IOIPDY Fullword Non-M

44、ultiplexed UHPI_HD23C3IOIPDY UHPI_HHWIL (I) on pin UHPI_HD16/HHWIL and GPIO on UHPI_HD24P2IOIPDY other pins in the following mode: UHPI_HD25N2IOIPDY Half-word Multiplexed Address and Data In this mode, UHPI_HHWIL indicates whether the high or UHPI_HD26N3IOIPDY low half-word is being addressed. UHPI_

45、HD27M3IOIPDY UHPI_HD28L3IOIPDY UHPI_HD29L4IOIPDY UHPI_HD30L2IOIPDY UHPI_HD31H4IOIPDY Universal Host-Port Interface (UHPI) Control UHPI_HBE0C6IIPDYUHPI Byte Enable for UHPI_HD7:0 UHPI_HBE1C5IIPDYUHPI Byte Enable for UHPI_HD15:8 UHPI_HBE2C4IIPDYUHPI Byte Enable for UHPI_HD23:16 UHPI_HBE3B2IIPDYUHPI By

46、te Enable for UHPI_HD31:24 UHPI_HCNTL0D9IIPDY UHPI Control Inputs Select Access Mode UHPI_HCNTL1C10IIPDY UHPI Host Address Strobe for Hosts with Multiplexed UHPI_HASC9IIPDY Address/Data bus UHPI_HRWD8IIPDYUHPI Read/not Write Input UHPI_HDS1D7IIPUY UHPI Select Signals which create the internal HSTROB

47、E active when: UHPI_HDS2C7IIPUY (UHPI_HCS = 0) 12.825MHz to 110MHz for ADV7401BSTZ-110; 12.825MHz to 80MHz for ADV7401BSTZ-80). 38 XTAL I Input pin for 28.63636 MHz crystal, or can be overdriven by an external 3.3 V 28.63636 MHz clock oscillator source to clock the ADV7401. 37 XTAL1 O This pin shoul

48、d be connected to the 28.63636 MHz crystal or left as a no connect if an external 3.3 V 28.63636 MHz clock oscillator source is used to clock the ADV7401. In crystal mode the crystal must be a fundamental crystal. 46 ELPF O The recommend external loop filter must be connected to this ELPF pin. 70 TE

49、ST0 These pins should be left unconnected or alternatively tie to AGND 59 TEST1 O These pins should be left unconnected TERMINAL DESCRIPTION (2/3) TERMINAL DESCRIPTION (3/3) IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -54 Q8800: ADV7401 (Multi-Format SDTV/HDTV Video Decoder) TX-SR876/SA876 Pin No. Mnemonic Type Function 15 SFL/SYNC_ O UT O SFL (Subcarrier Frequency Lock); this pin contains a serial output stream which can be used to lock the subcarrier frequency when this