Onkyo-TXSR8467-avr-sm 电路图 维修手册.pdf

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1、MD-2000TX-SR674/674E/8460 SERVICE MANUAL Ref. No. 3949 102006 AV RECEIVER MODEL TX-SR674 MODEL TX-SR674E MODEL TX-SR8467 TX-SR674 Black, Golden and Silver models 230-240V AC, 50Hz 120V/220-24 0V AC, 50/60Hz 220-230V AC, 50/60Hz B MPA, S MPA B MWT, B MWO, G MWT, G MWO G MGR, G MGQ, G MGK TX-SR674E Bl

2、ack and Silver models 230-240V AC, 50HzB MPP, B MPB, S MPP, S MPB TX-SR8467 Golden model 220-230V AC, 50/60HzG MGR RC-651M SAFETY-RELATED COMPONENT WARNING! COMPONENTS IDENTIFIED BY MARK ON THE SCHEMATIC DIAGRAM AND IN THE PARTS LIST ARE CRITICAL FOR RISK OF FIRE AND ELECTRIC SHOCK. REPLACE THESE CO

3、MPONENTS WITH ONKYO PARTS WHOSE PART NUMBERS APPEAR AS SHOWN IN THIS MANUAL. MAKE LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY INSULATED FROM THE SUPPLY CIRCUIT BEFORE RETURNING THE APPLIANCE TO THE CUSTOMER. MUTING PREVIOUS MENU GUIDE TOP MENU SETUPRETUR

4、N PLAYLIST/CATPLAYLIST/CAT RANDOMSUBTITLE PLAY MODE AUDIOREPEAT RC- 651M -/- TAPE MD/CDR HDD CABLE ON/STANDBY DIMMER ENTD TUN SLEEP 101112 INPUT SELECTOR HDDDVDVCR REMOTE MODE ZONE2 V1 V4 V2V3 CDTAPETUNER DVDMULTI CH LISTENING MODE TV DISPLAY TESTTONECH SEL SURROUNDSTEREO CINE FLTR LEVEL+LEVEL- L NI

5、GHT VOLVOL SAT VCR TV DVDRECEIVER CD INPUT +10 0CLR 123 456 789 ENTER CH DISC ALBUM TX-SR674 B MDD, B MDC, S MDC120V AC, 60Hz RadioFans.CN 收音机爱 好者资料库 TX-SR674/674E/8467 SERVICE PROCEDURE 1. Replacing the fuses This symbol located near the fuse indicates that the fuse used is show operating type, For

6、 continued protection against fire hazard, replace with same type fuse, For fuse rating, refer to the marking adjacent to the symbol. Ce symbole indique que le fusible utilise est e lent. Pour une protection permanente, nutiliser que des fusibles de meme type. Ce demier est indique la qu le present

7、symbol est apposre. 2. To initialize the unit The AV receiver uses a battery-less memory backup system in order to retain radio presets and other settings when its unplugged or in the case of a power failure. Although no batteries are required, the AV receiver must be plugged into an AC outlet in or

8、der to charge the backup system. Once it has been charged, the AV receiver will retain the settings for several weeks, although this depends on the environment and will be shorter in humid climates. 1. Press and hold down the VIDEO 1/VCR 1 button, then press the STANDBY/ON button when the unit is Po

9、wer on. 2. After Clear is displayed, the preset memory and each mode stored in the memory are initialized and will return to the factory settings. 4. Memory Backup Main microprocessor Q701 only. 1. Press and hold down the DISPLAY button , then press the STANDBY/ON button when the unit is Power on. T

10、he version is displayed on FL display for 3 seconds. 2. Press the STANDBY/ON button to Power off. 3. To check the version of microprocessor Main1.01/05305A Ex. REF NO.PART NAMEDESCRIPTIONPART NO.REMARKS F901FUSE10A-UL/T-233252330GR!, F901 orFUSE10A-T/UL-ST2252333GR!, F901 orFUSE5A-SE-TL250V252278GR!

11、, F902 FUSE5A-SE-EAK252078GR!, F902 orFUSE5A-SE-TL250V252278GR!, F910 FUSE5A-UL/T-233252326GR! F910 orFUSE5A-T/UL-ST2252258GR! F6901 FUSE12A-TUL-250V252301GR! F6902FUSE12A-TUL-250V252301GR! : TX-SR674 Korean model : TX-SR674 Hong kong model : TX-SR674 CDIN is the input data line for control port int

12、erface in SPI mode. 2 3 4 51 5 52 6 7 8 9 RXP1/GP01 RXP1/GP01 RXP1/GP01 RXP1/GP01 RXP1/GP01 RXP1/GP01 RXP1/GP01 VARX AGND LPFLT MUTEC AOUTA1- AOUTA1+ AOUTB1+ AOUTB1- AOUTA2- CX_SDIN2 CX_SDIN3 CX_SDIN4 SAI_SCLK SAI_LRCK OMCK ADCIN1 ADCIN2 CX_SDOUT RMCK SAI_SDOUT VLS DGND VD TXP RXPO CX_SDIN1 CX_SCLK

13、CX_LRCK VD DGND VLC SCL/CCLK SDA/CDOUT AD1/CDIN AD0/CS INT RST AINR- AINR+ AINL+ AINL- VQ FILT+ REFGND AOUTB4- AOUTB4+ AOUTA4+ AOUTA4- VA AGND AOUTB3- AOUTB3+ AOUTA3+ AOUTA3- AOUTB2- AOUTB2+ AOUTA2+ 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 64 63 62 61 60

14、 59 58 57 56 55 54 53 52 51 50 49 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 CS42518 IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -19 Q301 : CS42518 (8-Ch Codec with S/PDIF Receiver) TX-SR674/674E/8467 TERMINAL DESCRIPTION (2/3) Pin Name#Pin Description AD0/CS10Address Bit 0 (I2C)/Control Port C

15、hip Select (SPI) (INput) - AD0 is a chip address pin in I2C mode; CS is the chip select signal in SPI mode. INT11Interrupt (Ountput) - The CS42518 will generate an interrupt condition as per the Interrupt Mask register. RST12Reset (Input) - The device enters a low power mode and all internal registe

16、rs are reset to their default settings when low. AINR- AINR+ 13 14 Differential right Channel Analog Input (Input) - Signals are presented differentially to the delta-sigma modulators via the AINR+/- pins. AINL- AINL+ 15 16 Differential right Channel Analog Input (Input) - Signals are presented diff

17、erentially to the delta-sigma modulators via the AINR+/- pins. VQ17Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage. FILT+18Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. REFGND19Reference Ground (Input) - G

18、round reference for the internal sampling circuits. AOUTA1 +, - AOUTB1 +, - AOUTA2 +, - AOUTB2 +, - AOUTA3 +, - AOUTB3 +, - AOUTA4 +, - AOUTB4 +, - 36, 37 35, 34 32, 33 31, 30 28, 29 27, 26 22, 23 21, 20 Differential Analog Output (Output) - The full-scale differential analog output level is specifi

19、ed in the Analog Characteristics specification table. VA VARX 24 41 Analog Power (Input) - Positive power supply for the analog section. AGND25 40 Analog Ground (Input) - Ground reference. Should be connected to analog ground. MUTEC38Mute Control (Output) - The Mute Control pin outputs high impedanc

20、e following an initial power -on con- dition or whenever the PDN bit is set to a 1, forcing the codec into power -down mode. The signal will remain in a high impedance state as long as the part is in power-down mode. The Mute Control pin goes to the selected active state during reset, muting, or if

21、the master clock to left/right clock frequency ratio is incorrect. This pin is intended to be used as a control for external mute circuits to prevent the clicks and pops that can occur in any single supply system. The use of external mute circuits are not manda- toy but may be desired for designs re

22、quiring the absolute minimum in extraneous clicks and pops. LPFLT39PLL Loop Filer (Output) - An RC network should be connected between this pin and ground. RXP7/GPO7 RXP6/GPO6 RXP5/GPO5 RXP4/GPO4 RXP3/GPO3 RXP2/GPO2 RXP1/GPO1 42 43 44 45 46 47 48 S/PDIF Receiver Input/ General Purpose Output (Input/

23、 Output) - Receiver inputs for S/PDIF encoded data. The CS42518 has an internal 8:2 multiplexer to select the active receiver port, according to the Receiver Mode Control 2 resister. These pins can also be configured as general purpose output pins, ADC Overflow indicators or Mute Control outputs acc

24、ording to the RXP/General Purpose Pin Control resisters. RXP049S/PDIF Receiver Input (Input) - Dedicated receiver input for S/PDIF encoded data. TXP50S/PDIF Transmitter Output (Output) - S/PDIF encoded data output, mapped directly from one of the receiver inputs as indicated by the Receiver Mode Con

25、trol 2 resister. VLP53Serial Port Interface Power (Input) - Determines the required signal level for the serial port interfaces. SAI_SDOUT54Serial Audio Interface Serial Data Output (Output) - Output for twos complement serial audio PCM data from the S/PDIF incoming stream. This pin can also be conf

26、igured to transmit the output of the inter- nal and external ADCs. RMCK55Recovered Master Clock (Output) - Recovered master clock output from the External Clock Reference IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -20 Q301 : CS42518 (8-Ch Codec with S/PDIF Receiver) TX-SR674/674E/8467 Pin Name#Pin

27、Description CL_SDOUT56CODEC Serial Data Output (Output) - Output for twos complement serial audio data the internal and external ADCs. ADCIN1 ADCIN2 58 57 External ADC Serial Input (Input) - The CS42518 provides for up two external stereo analog to digital converter inputs to provide a maximum of si

28、x channels on serial data output line when the CS42518 is placed in One Line mode. OMCK59External Reference Clock (Input) - External clock reference that must be within the ranges specified in currently active on the serial audio data line. SAI_LRCK60Serial Audio Interface Left/Right Clock (Input/Ou

29、tput) - Determines which channel, Left of Right, is currently active on the serial audio data line. SAI_LRCK61Serial Audio Interface Serial Clock (Input/Output) - Serial clock for the Serial Audio Interface TERMINAL DESCRIPTION (3/3) TX-SR674/674E/8467 Buf Cout4 V6 V7 V8 BIAS CY1 CY2 PB1 PB2 PR1 PR2

30、 CY4 PB4 PR4 PB3 CY3 PR3 75EVout2 Y6 Y7 Y8 C6 C7 C8 PB6 PB5 CY6 CY5 PR6 PR5 6dB Buf Vout1 75E 75E CYout2 CYout3 6dB 6dB 75E 75E Yout3 Yout4 75EYout2 6dB Buf Yout1 75E 75E Cout2 Cout3 75ECout1 6dB 75E 75E PBout1 PBout2 6dB 6dB 75E 75E PRout1 PRout2 6dB 6dB 75E 75E Vout4 Vout3 V1 V2 V3 V4 4/6dB V5 Y1

31、Y2 Y3 Y4 4/6dB Y5 C1 C2 C3 C4 4/6dB C5 Vout2-FB Vout4-FB Vout3-FB Yout3-FB Yout4-FB Yout2-FB CYout2-FB CYout3-FB VCCGNDMUTE SCL SDA Logic O1 O2 IC BLOCK DIAGRAM AND TERMINAL DESCRIPTIONS -21 Q4002: AN15881A (Video SW for TV with Multi-signal 14 Inputs and 4 Outputs) BLOCK DIAGRAM TX-SR674/674E/8467

32、PR5 signal inputInPR534 PR4 signal inputInPR433 PR3 signal inputInPR332 DescriptionTypePin namePin No. PR2 signal inputInPR231 PR1 signal inputInPR130 PB6 signal inputInPB629 PB1 signal inputInPB124 CY6 signal inputInCY623 CY5 signal inputInCY522 CY4 signal inputInCY421 CY3 signal inputInCY320 CY2 s

33、ignal inputInCY219 CY1 signal inputInCY118 Bias voltageOutputBIAS17 PR6 signal inputInPR635 PB5 signal inputInPB528 PB4 signal inputInPB427 PB3 signal inputInPB326 PB2 signal inputInPB225 Chrominance signal input 8InC816 Chrominance signal input 7InC715 Chrominance signal input 6InC614 GroundGroundG

34、ND113 Chrominance signal input 5InC512 Chrominance signal input 4InC411 Chrominance signal input 3InC310 Chrominance signal input 2InC29 Chrominance signal input 1InC18 5.0V power supplyPower supplyVCC17 Luminance signal input 8InY86 Luminance signal input 7InY75 Luminance signal input 6InY64 Lumina

35、nce signal input 5InY53 Luminance signal input 4InY42 Luminance signal input 3InY31 IC BLOCK DIAGRAM AND TERMINAL DESCRIPTIONS -22 Q4002: AN15881A (Video SW for TV with Multi-signal 14 Inputs and 4 Outputs) TERMINAL DESCRIPTION (1/3) TX-SR674/674E/8467 VOUT2 feedback inputInVOUT2-FB67 VOUT2 signal o

36、utputOutVOUT268 VOUT1 signal outputOutVOUT169 VOUT3 signal outputOutVOUT366 VOUT3 feedback inputInVOUT3-FB65 I2C bus clock inputInSCL70 I2C bus data inputInSDA64 YOUT2 signal outputOutYOUT259 YOUT1 signal outputOutYOUT160 5.0V power supplyPower supplyVCC361 VOUT4 feedback inputInVOUT4-FB62 VOUT4 sig

37、nal outputOutVOUT463 DescriptionTypePin namePin No. YOUT2 feedback inputInYOUT2-FB58 YOUT3 signal outputOutYOUT357 YOUT3 feedback inputInYOUT3-FB56 YOUT4 signal outputOutYOUT455 YOUT4 feedback inputInYOUT4-FB54 GroundGroundGND353 COUT1 signal outputOutCOUT152 COUT2 signal outputOutCOUT251 COUT3 sign

38、al outputOutCOUT350 5.0V power supplyPower supplyVCC249 COUT4 signal outputOutCOUT448 CYOUT2 signal outputOutCYOUT247 CYOUT2 feedback inputInCYOUT2-FB46 CYOUT3 signal outputOutCYOUT345 CYOUT3 feedback inputInCYOUT3-FB44 GroundGroundGND243 PBOUT1 signal outputOutPBOUT142 PBOUT2 signal outputOutPBOUT2

39、41 General output 2OutO240 PROUT1 signal outputOutPROUT139 General output 1OutO138 PROUT2 signal outputOutPROUT237 Mute control pinInMUTE36 IC BLOCK DIAGRAM AND Q4002: AN15881A (Video SW for TV with Multi-signal 14 Inputs and 4 Outputs) TERMINAL DESCRIPTION (2/3) TERMINAL DESCRIPTIONS -23 TX-SR674/6

40、74E/8467 DescriptionTypePin namePin No. Luminance signal input 2InY280 Luminance signal input 1InY179 Video composite signal input 8InV878 Video composite signal input 7InV777 Video composite signal input 6InV676 Video composite signal input 5InV575 Video composite signal input 4InV474 Video composi

41、te signal input 3InV373 Video composite signal input 2InV272 Video composite signal input 1InV171 IC BLOCK DIA GRAM AND TERMINAL DESCRIPTIONS -24 Q4002: AN15881A (Video SW for TV with Multi-signal 14 Inputs and 4 Outputs) TERMINAL DESCRIPTION (3/3) AN15881A PBOUT2 PBOUT1 GND2 CYOUT3-FB CYOUT3 CYOUT2

42、-FB CYOUT2 COUT4 VCC2 COUT3 COUT2 GND3 COUT1 YOUT3-FB YOUT4 YOUT4-FB YOUT3 YOUT2-FB YOUT2 YOUT1 VCC3 VOUT4-FB SDA VOUT4 O1 PROUT2 MUTE PR5 PR4 PR3 PR2 PR6 PB4 PB3 PB5 PR1 PB6 PROUT1 O2 PB2 VOUT3-FB VOUT3 VOUT2-FB VOUT2 VOUT1 V1 SCL V3 V4 V5 V6 V7 Y1 V8 V2 Y2 Y8 VCC1 C1 C3 C2 C5 C4 Y7 GND1 Y4 Y5 Y6 C

43、7 C8 BIAS CY2 CY1 CY4 CY3 C6 CY5 CY6 PB1 Y364 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PIN CONFIGURATION TX-SR674

44、/674E/8467 IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -25 Q4004: LC74763-9836 (On-Screen Display IC) BLOCK DIAGRAM PIN CONFIGRATION VDD1 SYNCDET VCOOUT VCOIN FC AMPOUT PDOUT VSS SEPC SYNCIN CVCR CVIN VDD2 CVOUT LC74763 VSS XTALIN1 XTALOUT1 HSYNCOUT XTALIN2 XYALOUT2 VSYNCOUT CS SIN SCLK SECAM 525/62

45、5 NTSC/PAL 3.58/4.43 RST 302928 27 26252423 22212019181716 1 2 3456789101112131415 AMPIN Display RAM Decoder RAM write address counter Display control register Flashing/ reversal control register Serial- parallel converter 8-bit latch and command decoder Horizontal character size register Vertical c

46、haracter size register Horizontal display position register Vertical display position register Vertical dot counter Horizontal dot counter Vertical size counter Horizontal size counter Composite synchro- nization signal control Decoder Font ROM Shift register Character output control Background cont

47、rol video output control Synchronization signal generator Vertical display position detection Horizontal display position detection Line control counter Character control counter Sync detector Composite synchronization signal separator control Timing generator AFC circuit Sync separator Flashing/ re

48、versal control circuit CVOUTCVINCVCR Xtal OUT2 Xtal IN2 Xtal OUT1 Xtal IN1 VSYNOUTHSYNOUT CS SIN SCLK RST SECAM 525/625 NTSC/PAL 3.58/4.43 VDD1 VDD2 VSS SYNCDET VCOIN VCOOUT FC AMPIN AMPOUT PDOUT SYSIN SEPC TX-SR674/674E/8467 IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -26 Q4004: LC74763-9836 (On-Sc

49、reen Display IC) TERMINAL DESCRIPTION Pin No.SymbolFunctionDescription 1VSSGroundGround connection 2XtalIN1 Crystal oscillator connection Connection for the crystal and capacitor used to form the crystal oscillator that generates the internal synchronization signal. The oscillator can be selected with a command switch. 3XtalOUT1 4HSYNCOUT Horizontal synchronization Outputs the horizontal synchronization signal (AFC). The output polarity can be selected output(metal option). Also functions as general output port (command swit