Marantz-ES-7001-Service-Manual(1) 电路图 维修手册.pdf
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1、Please use this service manual with referring to the user guide ( D.F.U. ) without fail. Service ManualHome Theater System ES7001 ES7001 /F B/K1B/N1B/U1B Part no. 90M20AJ855020 First Issue 2007.09 MZ ES7001ES7001 ? ? ? ? ? TABLE OF CONTENTS SECTION PAGE 1. TECH NI CAL SPEC I FI CA TIONS . 1 2. CAUTI
2、ON . 1 3. FEATURES . 2 4. SERVICE MODE. 4 5. SYSTEM ERROR . 6 6. WRITING AND UPDATE SOFTWARE . 7 7. TROUBLESHOOTING / (Japan) .31 / (36) 8. WIRING DIAGRAM .41 9. BLOCK DIAGRAM . 43 10. SCHEMATIC DIAGRAM . 45 11. PARTS LOCATION . 63 12. MI CRO PRO CES SOR AND IC DATA .73 13. EXPLODED VIEW AND PARTS L
3、IST .91 14. ELECTRICAL PARTS LIST . 95 15. ABOUT REPLACE THE MICROPROCESSOR WITH A NEW ONE . 113 2nd EDTION 1. The model no. ES7001/N1B was added in this service manual. 2. The SCHEMATIC DIAGRAM (page45, 46, 57, 58, 59, 60, 61, 62) was changed. 3. The PARTS LIST was changed. 1. ES7001/N1B仕向追加。 2. 回路
4、図(45, 46, 57, 58, 59, 60, 61, 62頁)変更。 3. 変更。 RadioFans.CN 收音机爱 好者资料库 MARANTZ DESIGN AND SERVICE Using superior design and selected high grade components, MARANTZ company has created the ultimate in stereo sound. Only original MARANTZ parts can insure that your MARANTZ product will continue to perfor
5、m to the specifications for which it is famous. Parts for your MARANTZ equipment are generally available to our National Marantz Subsidiary or Agent. ORDERING PARTS : Parts can be ordered either by mail or by Fax. In both cases, the correct part number has to be specified. The following information
6、must be supplied to eliminate delays in processing your order : 1. Complete address 2. Complete part numbers and quantities required 3. Description of parts 4. Model number for which part is required 5. Way of shipment 6. Signature : any order form or Fax. must be signed, otherwise such part order w
7、ill be considered as null and void. SHOCK, FIRE HAZARD SERVICE TEST : CAUTION : After servicing this appliance and prior to returning to customer, measure the resistance between either primary AC cord connector pins ( with unit NOT connected to AC mains and its Power switch ON ), and the face or Fro
8、nt Panel of product and controls and chassis bottom. Any resistance measurement less than 1 Megohms should cause unit to be repaired or corrected before AC power is applied, and verified before it is return to the user/customer. Ref. UL Standard No. 60065. In case of difficulties, do not hesitate to
9、 contact the Technical Department at above mentioned address. 070719MZ USA MARANTZ AMERICA, INC 100 CORPORATE DRIVE MAHWAH, NEW JERSEY 07430 USA EUROPE / TRADING MARANTZ EUROPE B.V. P. O. BOX 8744, BUILDING SILVERPOINT BEEMDSTRAAT 11, 5653 MA EINDHOVEN THE NETHERLANDS PHONE : +31 - 40 - 2507844 FAX
10、: +31 - 40 - 2507860 KOREA D D = 3.3-V digital; P = power/ground/decoupling; I = input; O = output (2)All pullups are 200-mA weak pullups and all pulldowns are 200-mA weak pulldowns. The pullups and pulldowns are included to ensure proper input logic levels if the terminals are left unconnected (pul
11、lups = logic-1 input; pulldowns = logic-0 input). Devices that drive inputs with pullups must be able to sink 200 mA, while maintaining a logic-0 drive level. Devices that drive inputs with pulldowns must be able to source 200 mA, while maintaining a logic-1 drive level. Q501 : TAS5508 82 TERMINAL 5
12、-V TYPE(1)TERMINATION(2)DESCRIPTION TOLERANT NAMENO. PWM_P_345DOPWM 3 output (differential +) PWM_P_447DOPWM 4 output (differential +) PWM_P_556DOPWM 5 output (differential +) PWM_P_658DOPWM 6 output (differential +) PWM_P_750DOPWM 7 (lineout L) output (differential +) PWM_P_852DOPWM 8 (lineout R) o
13、utput (differential +) RESERVED21, 22,Connect to digital ground 23, 64 RESET11DI5 VPullupSystem reset input, active-low. A system reset is generated by applying a logic low to this terminal. RESET is an asynchronous control signal that restores the TAS5508 to its default conditions, sets the valid o
14、utput low, and places the PWM in the hard mute (M) state. Master volume is immediately set to full attenuation. On the release of RESET, if PDN is high, the system performs a 4- to 5-ms device initialization and sets the volume at mute. SCL25DI5 V I2C serial-control clock input/output SCLK27DI5 VSer
15、ial-audio data clock (shift clock) input SDA24DIO5 V I2C serial-control data-interface input/output SDIN131DI5 VPulldownSerial-audio data input 1 is one of the serial-data input ports. SDIN1 supports four discrete (stereo) data formats and is capable of inputting data at 64 Fs. SDIN230DI5 VPulldownS
16、erial-audio data input 2 is one of the serial-data input ports. SDIN2 supports four discrete (stereo) data formats and is capable of inputting data at 64 Fs. SDIN329DI5 VPulldownSerial-audio data input 3 is one of the serial-data input ports. SDIN3 supports four discrete (stereo) data formats and is
17、 capable of inputting data at 64 Fs. SDIN428DI5 VPulldownSerial-audio data input 4 is one of the serial-data input ports. SDIN4 supports four discrete (stereo) data formats and is capable of inputting data at 64 Fs. VALID39DOOutput indicating validity of PWM outputs, active-high VBGAP10PBand-gap vol
18、tage reference. A pinout of the internally regulated 1.2-V reference. Typically has a 1-nF low-ESR capacitor between VBGAP and AVSS_PLL. This terminal must not be used to power external devices. VR_DIG33PVoltage reference for 1.8-V digital core supply. A pinout of the internally regulated 1.8-V powe
19、r used by digital core logic. A 4.7-F low-ESR capacitor(3) should be connected between this terminal and DVSS. This terminal must not be used to power external devices. VR_DPLL17PVoltage reference for 1.8-V digital PLL supply. A pinout of the internally regulated 1.8-V power used by digital PLL logi
20、c. A 0.1-F low-ESR capacitor(3) should be connected between this terminal and DVSS_CORE. This terminal must not be used to power external devices. VR_PWM48PVoltage reference for 1.8-V digital PWM core supply. A pinout of the internally regulated 1.8-V power used by digital PWM core logic. A 0.1-F lo
21、w-ESR capacitor(3)should be connected between this terminal and DVSS_PWM. This terminal must not be used to power external devices. VRA_PLL1PVoltage reference for 1.8-V PLL analog supply. A pinout of the internally regulated 1.8-V power used by PLL logic. A 0.1-F low-ESR capacitor(3)should be connec
22、ted between this terminal and AVSS_PLL. This terminal must not be used to power external devices. VRD_PLL7PVoltage reference for 1.8-V PLL digital supply. A pinout of the internally regulated 1.8-V power used by PLL logic. A 0.1-F low-ESR capacitor(3)should be connected between this terminal and AVS
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