Pioneer-CT9R-tape-sm 电路图 维修手册.pdf

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1、(D rrloN Erl Shown the photo is model CT-9R ORDER NO. ARP -050 -O Ouar?-PLL Direct Drive/Ribbon Sendust Head STEREO CASSETTE TAPE DECK eT-tr|trl lI l-rr GT-8Fl r This service manual refers to the circuit descriptions. For the mechanism discription, please see service manual of the CT-7R (ARP-001-0).

2、 PICINEEFI ELECTFICINIG CCIFIPCIFIATICIN 4-1. Mesu.o 1-chome, Mesuno-ku, Tokyo 1s3, Jepen U.B. PfCIfEEFl ELECTFICXIICB CCIFIFCIIIATICIN A5 Oxfond Dnive, Moonechie, New iJensey O7O74, u.S.A. PICXIEEFI ELEC?F|CIN|C aEIJFICIFE N.V. Luithagen-Haven 9, 2O3O Antwenp, Etelgium PfC fEEFf ELECTFICTNICB A|JAT

3、F|ALIA PTY. l.rE,. 178-1A4 Eloundeny Fload, Bneeside. VictoniE 3195. Aust.alie Y Z O D E C . I 9 8 IPrinted in lapan RadioFans.CN 收音机爱 好者资料库 1 . CIRCUIT DESCRIPTIONS 1.1 PLAYBACK FLOW The signal picked up by the playback head is amplified by the equalization amplifiers, Q1701 and Q1703. At the same

4、time, frequency response is corrected. The output from the equalization amplifiers is level-adjusted by variable resistor VR1703 and then applied to Q1705. In addition to being an amplifier, Q1705 also functions to correct fre- quency response. When normal tape is used, Q1707 wiU be ON, and the comb

5、ination of Q1701, Q1703, and Q1705 will set equalization to 120ps. For metal or CrO2 tape, Q1707 will remain OFF and equaliza- tion will be 70ps. The output from Q1705 is applied to pin 15 of IC601 (HA11226) in the Dolby circuit. Here, it is passed out pin 9. This output is then applied to pin 16 of

6、 IC602 and output from pin 9. The out- put signal from IC602 passes via the MONITOR switch to LINE OUTPUT. (A description of the Dolby circuit will be presented later.) 1.2 RECORDING FLOW The signal input to the microphone jack is first amplified by the mic amplifier, IC1501 (NJM- 4558D), then passe

7、d via the INPUT selector switch to the INPUT volume. Level is adjusted by the IN- PUT volume and the signal is then applied to the flat amp IC1701 (NJM4558D). The amplifiedsignal is then pa.ssed through the MPX filter and into the Dolby circuit. In the Dolby circuit, it is passed through Q608, IC602

8、 (HA11226), and IC601 (HA11226) before input to the recording ampli- fier. From the recording amp, it is applied to the recording head. 1.3 CONTROL CIRCUIT The control circuitry of this unit is contained in CPU PD6006, expansion IC PM3001, and IC PA3010 used in the MS function. The key signals appli

9、ed to PD6006 are transmitted to PM3001 as 16-bit serial data, and PM3001 then uses this data to control the various circuits. When a mode key is activated, the 16-bit serial data transmission is output from pin 5 of PD6006. This is shown in Fig. 1-1. Also a clock pulse is output from pin 7. (Data an

10、d clock pulse trans- mission occurs once each time the key isactivated.) The 16-bit serial data is applied to pin 3 of the expansion IC, PM3001, and the leading edge of the clock pulse is read into the shift register of PM 3001 through pin 2. After both read events are completed, a STB (strobe) puls

11、e is applied to pin 1, and PM3001 then starts transmitting control signals from its various output pins in accordance with which key was activated. (Refer to Fig. 1-3.) The following sections will describe the various circuit operations occurring when a mode key is activated. Operations will be desc

12、ribed for the FWD direction of travel. (Except where other- wise specified, the pin nos. will be for PM3001.) The DOLBY MUTE circuit shown in the signal path diagram (Fig. 1-1) tums Q313 ON to mute all circuik only when the position of the Dolby switch is changed. 1. STOP Mode Key ON -Power switch O

13、N Mechanism The 16-bit serial data transmission from PD6006 will cause pin 7 and 8 of PM3001 to go high, tuming SOL L and R OFF. The mechanism will thus be placed in a STOP status. Motor Pin 4 and 5 will be low. and the reel motor will be in a STOP status. Signal Path and other circuits When pin 9 i

14、s high, Q621, Q311, and Q1603 are all ON. This causes LINE OUTPUT and the head- phone amp to be muted. If pin 11 also goes high, Q309 is tumed ON, placing the REC AMP input at a ground potential. When pins 12 and 13 go low, Q302 tums OFF, stopping the bias oscillator circuit, and extinguishing the R

15、EC IND. Muting is applied to all circuits in a STOP status. 2. PLAY Mode Key ON Mechanism Pin 7 and 8 of PM3001 go low, activating SOL L and R. (Refer to the timing chart in Fig. 1-5.) This places the mechanism in the PLAY mode. Motor Pin 4 goes to a low level, while pin 5 is held at a middle (M) le

16、vel, causing RM R (reel-motor R) to start turning. P06006 t-= Fig. 1-1 PD6006 Data output 3 35)S RadioFans.CN 收音机爱 好者资料库 MS CIRCUT PULL-UP RESISTOR PM3OOl (EXPANSIO t ArJro RESEI I crRcu rT REW R FF REC BIAS M MUSIC REPEAT PREVENTION FWD REV -rEEC MUTE -r- REC 4 PLAY +PAUSE . F F _L REW -gSTOP .J-DI

17、R HEAO ffivl L REc BLANK SEARCH .J_ INOEXSCAN MS /SKIP REC HEAD t_ PA301 0 ODE PINNO rEc)LAYCFF 35HLH 34LHH PD 6006 ( cPu ) +sv FOR POWER SUPPLY CT-8R sroot stotT -oNLY- -ci- i qs-orl - tO-O+-O?t ,- qr I M E M O R Y O - J I I I ; swI|MERli- _t_t sw t- HALF SW M S READER SENSING M. REPEAT I / B / S M

18、 -STOP DATA T- PLAY T - R E C S T B M O D E I S K I P M O D E t r M / T F - R S W 8 / S REC SENSOR AUTO BLE PAUSE IND REC MUTE t N 0 M S M U T E P A U S E M / R I N D F F T / S I N D R E W A / S I N D S T O P S K I P I N O DIRECTION G N D B . L . E . CIRC U IT o. )IN NO D 3 3HLH 3 2LHH Fig. 1-2Contr

19、ol system block diagram RadioFans.CN 收音机爱 好者资料库 MS CIRCUTREEL MOTOR CIRCUIT J lauroRESETl I lsoL. I crRcu rr r- | L I Gto* FF REC BIAS MUTE MUTE AUTO RESET CIRCU IT HEAD PHONES A M P L - _J MOTOR Lr_ 1 2 3 4 -t T-l r-t rr I . u l i l A l A l A U U U Serial output to PM3001 o 6NC 7CLOCKOUT CLOCK outp

20、ut to PM3001 oo INC ISTBOUTSTB output to PM30O1 r _ ST B 10SKIPOUT SKIP key scan output J-L _J_-L -L- -Lr -1_J- -t_r KEY SCAN output oo 1 1M/lOUT MUSIC REPEAT, INDEX SCAN key scan output 12B/SOUTBLANK SEARCH key scan output o 13AUTO BLEOUTAUTO BLE start output ffi;,pffi- l=-fr 14PAUSE INDOUTPAUSE in

21、dicator output (effective low) I ndicator output oo 15 REC MUTE IND OUTREC MUTE indicator output (effective low) o 16MS MUTEOUT Ms MUTE output, PA301o MS signal MUTE output (low level while reel motor turning during blank detector operation o 17M/R INDOUTMUSIC REPEAT indicator output (effective lowl

22、 Indicator output 18r/s rNDOUT INDEX SCAN indicator output (effective lowlXX 19B/S INDOUTBLANK SEARCH indicator.output (effective lowl XX 20SKIP INDOUT SKIP indicator output (effective low) 21GNDGND o 22DIRECTIONI NDIR (directionl key input Mode key input 23STOP I NSTOP key input 24REWI NREW key inp

23、ut 25F FI N F F key inputo 26PAUSEINPause key input o 27PLAYI NPLAY key input 2ARECI N REC/PLAY key input 29REC MUT I NREC MUTE key input o 30REC SensorI NREC sensor switch input (enabled tow, disabled high) Mechanism SW input o 31F-R SWI NFWD/REV sensor switch input (FWD: L; REV: H) 32MODE II N Mod

24、e selector switch input Mode selector SW input J 33MODE III N o 34T.RECI NTimer REC switch input Timer mode SW input 35T.PLAYI NTimer PLAY switch input o 36r/B/s I NINDEX SCAN, BLANK SEARCH, SKIP key inputKey matrix input 37M.REPEATI NMUSIC REPEAT key inpur oo 38SENSINGI NSensing pulse input (from P

25、A2010 pin) J-l_l-Ll-L Reelturninsoo 39LEADEFI NTape leader pulse detector input (from pin 2, PA3010) n *Tape leader detected o 40MS I N Blank signal input (H level between selection in PLAY, FF, REW; L level during selection; H level all other timesl o 4 1HALF SWI N Cassette loading switch input (Lo

26、aded: L ; Unloaded: H)o 42VDD+5V power source o Fig. 1-4 PD6006 Pin description Timing chart 1 F W D P I N NO.,N POWER ON STOPI t s STOPR E WS T O P P L A Y STO P PLAY / PAU S ES T OP 4R M L T r f R tvlR L Tt = -.,r T l t 2 i*M 1F- 6H E A D S W L 7S O L , L L H I) v L . x L H I Z u g F *s g6 PAUSE D

27、 I R STOP t l STOP l* , I PAUSE - f 2 T I *l l* PLAY l-1 A t i T l l t l I t , t I l l l 9P B M U T E L - f-l H T r T 2 T6 l oLINE MUTE _l_ H t lRE C MUTE L H t 2B I A S L t 3RE C SW L f t : 4 2 5 m S T 2 : 2 7 5 m S T ! : 2 7 5 m S T 4 : 2 2 5 m S T 5 : t A S m S T 6 : 4 2 S m S T 7 : 4 2 S m S T s

28、 : 3 2 5 m S T e : Z g m S T t o : l 2 5 m S Fig. 1-5 Timing chart of PM3001, 1 7 Timing chart 2 FWD P I N NO. -NooE FUNCTIOiI - STO PREC / PLA YSTOP PLAY / PAUS EREC/PAUSEREC /PLAYPL A YRECl PLA Y?EC /PAUSE ST O P 4R M L L f,R M . R L J z - M t* M H EA O S W L r 9T9 T s r r T g - f eT e 7 S O L . L

29、 r H - R S O L . R n = z ; g ) key is activated, and when the beginning of a music selection is located, pin 13 of PA3010 drops from high to low. The trailing edge of the pulse effecting the level drop at the PD6006 pin sets the REWIND mode and rewinds the tape back to the beginning of the selection

30、, and enters the PLAY mode. Fig. 1-17 Blank detector circuit At the end of the selection, if the unrecorded section of the tape (functioning to change the output from pin 13 from low to high) holds the level continuously high for over 8 seconds, PD6006 then selects the FF mode, continuing in that mo

31、de until the beginning of the next selection drops the level at pin 13 low. It then rewinds ( ) mode; if operat- ing in REV, it is started in the REW ( ) mode is entered; if in REV, REW ( ) is entered. The unit then cycles through a search operation to locate the beginning of a selection, then goes

32、into the PLAY mode. Playback of the selection starts and continues for the 7 seconds that pin 18 of PA3010 is held low. REW REW KEY ON D I R E c T I N LEADEFi PLAY r 8 s e c = Fig.1-21 INDEX SCAN operationFig. 1-22 BLANK SEARCH operation 4. MUSIC REPEAT Operation When the MUSIC REPEAT key is placed

33、ON while the unit is presently in the PLAY status, the present music selection (or the next if un- recorded tape selections) continues to completion, then the output from pin 13 of PA3010 goes from Iow to high. After the output of pin 13 has been held high f.ot 2.5 seconds, the unit returns to the b

34、eginning of that selection and repeats playback. This operation may be repeated for the same selection for up to 8 times, after which MUSIC REPEAT is cleared and a STOP status entered. out put The STOP status will also be entered in case the t end sensor is activated. Fig. 1-23 MUSIC REPEAT operatio

35、n 1.8 DOLBY NR PROCESSOR The CT-9R and CT-8R both feature type B and type C Dolby NR processors. The type C Dolby NR system enables noise to be reduced by up to 20dB at frequencies above 7lIlz. The basic operating principles are the same as for the type B Dolby NR system, the major difference lying

36、in the use of two separate pro- cessor stages (a high level stage and a low level stage connected in series). Switching to a type B Dolby NR processor also enables Wpe B encoded tapes to be played. Block diagxams for encoding and decoding operations are outlined in Ftgs. L-25 and L-26 respectively.

37、The corresponding input/output frequency response curves are shown in Fig. 1-24. The REC srgnal is passed through a spectral skewing circuit (see Fig. 1-25) which is an LC resonator with an for at 2OWlz, and designed to prevent low to mid-range decoding error (high level leakage) due to high level s

38、ignals. The REC signal is then applied to the lst processor stage (high level stage) where it is divided rnto 2 signals, the main signal being passed directly to adder A, while the main signal is passed via SCF-1 (side chain filter), arnplifier B and over- shoot suppressor C before being applied to

39、adder A where the main and sub signals are recombined. 15 .* Input Fig. 1-24 InpuVOutputcharacteristic In addition, the amplifier B output is applied to rectifier E (non-linear integrating type) via ampli fier D, the rectified output being applied to VCR-1 (voltage control resistor) of SCF-1. This S

40、CF is a variable high-pass filter where the frequency response is varied according to the VCR value. The VCR value is increased under low level con- ditions, and the SCF-1 tumover frequency is determined by CURI. The level of the adder A output will thus be 10dB higher than the main signal level (ar

41、ound 1.5kHz), and the dynamic range will be contracted. The VCR value will drop when the VCR control voltage exceeds the threshold value, and the SCF-1 turnover frequency will be increased by C2lC!lR2lVCR-1, thereby attenuating low to mid-range signals in the sub- signal. And since the sub to main s

42、ignal ratio is lower at higher input signal frequencies, the degree of dynamic range conhaction is smaller. The adder A output is applied to the 2nd processor stage (low level stage) where the signal whose dynamic range was compressed in the lst compressor stage is added. In order to further compres

43、s the dynamic range in this 2nd processor stage, the threshold level of the 2nd processor VCR-2 control voltage is set below the corespond- ing level of the 1st processor stage. The 2nd processor stage also includes an anti-saturation circuit R. The purlpose of this circuit is to effect the same imp

44、rovements as the spectral skewing circuit. During playback (se Fig. t-26), the same basic circuitry is used as in recording mode, but with the 1st and 2nd processor stages in the reverse order. Since the circuit starts from the output of the inverter (sub-signal output), a negative feedback loop is

45、formed with the sub-signal being subtracted from the main signal in adder A. And since the sub- signal path operation is exactly the same as during recording mode, the decoding and encoding characteristics complement each other. Further- more, the anti-saturation P and spectral de-skewing characteri

46、stics during decoding are the exact REC IN P.B. IN opposite of the conesponding characteristics during encoding. Consequently, a flat frequency response is maintained at all levels after all phases of the encoding and decoding opperations are completed. REC OUT PB. OUT Spectral de-skewing lst proces

47、sor (high levet stagol 2nd processor (low level stagel Inverter ii salgelenRI Inverter | | saruralton Ft i Adder A r : I l-l Adder A Overchoot Amp. B suppressor C rl ll tl tl gl rl tl tl ii tl ll tl tl rl FiS. t-ZS Block diagram for encoding operation 2nd procesor (low lanel stagellst processor (hig

48、h lovel stagel Adder A lnverter Anti- saturation P Adder A OvershootOvershoot suppressor C Amp. IC Amp. B I I I I I I I I I I I I I I I I I I I I I I 16 scF- | R4 c6 Overshoot Amp. B suppressor g):.,!-,thln L= iJntirier E, Amp. D, scF-2scF- | i- tl -lr* t+ Amp. D Rectifier El + J | -l*L ;.irireE Fig

49、. 1-26 Block diagram for decoding operation 1.9 AUTO BLE CIRCUIT Auto BLE provides the function of setting bias, recording level and equalization to obtain the ideal recording characteristics exhibited by the various type formulations. Operation is fully automatic. When the AUTO key is pressed, a signal is trans- mitted from PD4010 to control IC PD6006 in initiating mechanism operation and coarse-adjust recording level. It then shifts to bias adjustment. Bias is set by detecting the ideal current, d