Pioneer-MJD508-mdr-sm电路图 维修手册.pdf
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1、ORDER NO. PIONEER ELECTRONIC CORPORATION4-1, Meguro 1-Chome, Meguro-ku, Tokyo 153-8654, Japan PIONEER ELECTRONICS SERVICE, INC. P.O. Box 1760, Long Beach, CA 90801-1760, U.S.A. PIONEER ELECTRONIC (EUROPE) N.V . Haven 1087, Keetberglaan 1, 9120 Melsele, Belgium PIONEER ELECTRONICS ASIACENTRE PTE. LTD
2、. 253 Alexandra Road, #04-01, Singapore 159936 PIONEER ELECTRONIC CORPORATION 1999 7. GENERAL INFORMATION .49 7.1 DIAGNOSIS.49 7.1.1 TROUBLESHOOTING .49 7.1.2 DISASSEMBLY .52 7.2 PARTS .55 7.2.1 IC .45 7.2.2 DISPLAY .66 8. PANEL FACILITIES AND SPECIFICATIONS .68 MINIDISC RECORDER RRV2144 MJ-D508 1.
3、SAFETY INFORMATION.2 2. EXPLODED VIEWS AND PARTS LIST .4 3. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM .12 4. PCB CONNECTION DIAGRAM .28 5. PCB PARTS LIST.37 6. ADJUSTMENT.41 CONTENTS TZZE MAY 1999 Printed in Japan TypePower Requirement Remarks Model MJ-D508 THIS MANUAL IS APPLICABLE TO THE FOLLOWING MODEL
4、(S) AND TYPE(S). KUXJAC120V MYXJAC220230V MYXJGR/FRAC220230V NVXJAC230V DAC MODE INPUT SELECTOR DISPLAY /CHARA NAME CLIP REC/PLAY MODE SYNCHRO REC DIGITAL REC LEVEL 4? ANALOG REC LEVEL EDIT/NO !? it is not meant for the casual do-it-yourselfer. Qualified technicians have the necessary test equipment
5、 and tools, and have been trained to properly and safely repair complex products such as those covered by this manual. Improperly performed repairs can adversely affect the safety and reliability of the product and may void the warranty. If you are not qualified to perform the repair of this product
6、 properly and safely, you should not risk trying to do so and refer the repair to a qualified service technician. WARNING This product contains lead in solder and certain electrical parts contain chemicals which are known to the state of California to cause cancer, birth defects or other reproductiv
7、e harm. Health normally connected to GND when used. 15TEST1I 16TEST2ITest-use input; Encoder/Servo Mode and ATRAC Mode changeover No.NameI/O Description 17X176KOOClock output; f = 176.4kHz (4fs) 18FODRFOFocus servo forward output; PWM 19FODRROFocus servo reverse output; PWM 20TRDRFOTracking servo fo
8、rward output; PWM 21TRDRROTracking servo reverse output; PWM 22SLDRFOSlide servo forward output; PWM 23SLDRROSlide servo reverse output; PWM 24SPDRFOSpindle servo forward output or spindle servo output; PWM 25SPDRROSpindle servo reverse output or spindle rotation forward/reverse changeover 26RAA3OAd
9、dress output to external D-RAM; ADR3 27RAA2OAddress output to external D-RAM; ADR2 28RAA1OAddress output to external D-RAM; ADR1 29RAA0OAddress output to external D-RAM; ADR0 (LSB) 30RAA10OAddress output to external D-RAM; ADR10 (MSB) 31VDD2Power supply for DRAM interface Pin Assignment (Top view) P
10、in Function MJ-D508 61 No.NameI/O Description 32RAA4Address output to external D-RAM; ADR4 |O | 36RAA8Address output to external D-RAM; ADR8 37RAOEXOData output enable signal output to external D- RAM 38DGNDDigital GND 39RACASXOColumn address strobe signal output to external D-RAM 40RAD2I/OExternal
11、DRAM and data input/output; D2 41RAD3I/OExternal D-RAM and data input/output; D3 (MSB) 42RAA9OAddress output to external D-RAM; ADR9 43RARASXOLow address strobe signal output to external D- RAM 44RAWEXOData write enable signal output to external D- RAM 45RAD1I/OExternal D-RAM and data input/output;
12、D1 46RAD0I/OExternal D-RAM and data input/output; D0 (LSB) 47TCRSOTrack cross signal 48ACRCEROADIP CRC error flag monitor output 49PLCKOEFM PLL clock output during Play 50EFM0OEFM signal output during Record; C1F (C1 error flag) monitor output during Play. 51X700KOOClock output; f = 705.6kHz; clock
13、is not output when RSTX = 0. 52EXPORT0OMicrocomputer extension output port 0 53EXPORT1OMicrocomputer extension output port 1 54TESO1OMicrocomputer extension output port 2 during PLLLR changeover 55TEST3I/OMicrocomputer extension output port 3 during PLLOSC changeover 56TEST4I/OMicrocomputer extensio
14、n output port 4 during EXTCLK changeover 57CDDATAI/OCD data input for high-speed dubbing; micro- computer extension port 5 during changeover 58CDLRCKI/OCD LR clock input for high-speed dubbing; microcomputer extension port 6 during changeover 59CDBCLKI/OCD bit clock input for high-speed dubbing; mic
15、rocomputer extension port 7 during changeover 60VXIIPLL clock input for varying pitch 61VPOOPLL phase error input for varying pitch 62VDD1Digital power supply 63DGNDDigital GND 64XII Oscillation circuit input; 33.8688MHz 65XOO No.NameI/O Description 66DINIDigital input signal 67DOUTODigital output s
16、ignal 68PLLBVCCapacitor connection terminal for PLLB signal 69DGNDDigital GND 70LRCKOMusic data Lch/Rch changeover output 71BCLKOMusic data shift lock 72DFCKOClock for AD/DA converter digital filter; 256fs 73ADDATAIAudio data input 74DADATAOAudio data output 75FEMONOFocus error signal monitor output
17、 76TOTMONOTotal signal monitor output 77TEMONOTracking error signal monitor output 78SBCKIDIN sub code readout clock; EIAJ CP-309 format 79SBOODIN sub code serial data; EIAJ CP-309 format 80SBSYODIN sub code block synchronization signal; EIAJ CP-309 format 81SFSYODIN sub code frame synchronization s
18、ignal; EIAJ CP-309 format 82FOKOFocus OK detection signal; 0: Focus OK 83SENSEOServo status detection signal; 1: Auto Move/ Auto Jump/Auto Focus lead-in in progress 84COUTOTrack cross signal output 85MCCKOClock output for microcomputer; clock is output even when RSTX = 0. 86DINTXOInterrupt Request o
19、utput signal for system computer interface 87VDD1Digital power supply 88DGNDDigital GND 89RSTXITip reset input; reset with L (NOTE) 90SYD0I/OSystem computer interface data bus terminal; (LSB) 91SYD1 |I/OSystem computer interface data bus terminal 96SYD6 97SYD7I/OSystem computer interface data bus te
20、rminal; (MSB) 98SYWRXISystem computer interface register write pulse input 99SYRDXISystem computer interface register read pulse input 100SYRSISystem computer interface register select input Terminals denoted with an asterisk (*) are (Open) terminals that are not externally connected. NOTE) Set RSTX
21、 to L when the power is being turned ON or after it has been turned ON. MJ-D508 62 PDG240A (IC701: DISPLAY UNIT ASSY) System Control -com Block Diagram Pin Assignment (Top view) MJ-D508 63 No.NameI/O Description 1G1/A1Output terminals used jointly for the FDP timing signal (grid connection) and the
22、2G0/A0O/Osegment signal (anode connection). 3NCNC (connected to VDD) 4PE0/INT0/EC0 I/I/ITimer/counter external event input terminal 5PE1/INT1/EC1 6PE2/INT2I/IExternal interrupt request input terminal 7PE3/INT3/NMII/I/INonmaskable interrupt request input terminal 8PE4/RMCI/IRemote control reception c
23、ircuit input terminal 9PE5 10PE6/PWMO/O14 bit PWM output terminal 11PE7/TO/ADJO/O/O16 bit timer/counter rectangular waveform output, 32 kHz oscillation division output terminal 12PC0/KR0Key return input terminal for performing of |IO/Ikey scanning with the FDP segment signal 19PC7/KR7 20PB0/CINTIO/I
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