TM-V708A_serv.pdf

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1、144/440MHz FM DUAL BANDER TM-V708A 2004-11 PRINTED IN JAPAN B51-8704-00 (S) 237 SERVICE MANUAL CIRCUIT DESCRIPTION .2 SEMICONDUCTOR DATA .14 COMPONENTS DESCRIPTION .17 TERMINAL FUNCTION.19 PARTS LIST.20 EXPLODED VIEW.31 PACKING .32 ADJUSTMENT .33 PC BOARD TX-RX UNIT (X57-5860-12).47 PANEL UNIT (X54-

2、3290-00) .53 SCHEMATIC DIAGRAM.57 BLOCK DIAGRAM.67 INTERCONNECTION DIAGRAM .69 LEVEL DIAGRAM.70 OPTION (PG-4X) .71 SPECIFICATIONS.BACK COVER CONTENTS Cabinet (UPPER) (A01-2122-23) Knob (ENC) (K29-5381-03) Panel (DISPLAY) (A62-0775-03) Microphone (T91-0636-05) Knob (VOL) (K29-5222-03) Knob (SQL) (K29

3、-5223-03) Button knob (K29-5400-11) Button knob (K29-5400-11) Panel (MAIN UNIT) (A62-1122-03) TM-V708A 2 CIRCUIT DESCRIPTION Model UHF: D317, D318) with DC AMP DB Q208 2SB1565 (E,F) DC AMP COMPARATOR Q209 2SC4617 (R) IC200 TA75S01F D318 D317 D19 D18 VHF UHF CPU the reference voltage output from the

4、CPU. The output signal is amplified by Q209 and Q208 and fed to the power module to keep transmission output constant. 3-4. Overheating protection circuit To protect from the thermal destruction of the power module, the voltage of the thermistor (TH1) near the power module is monitored by the CPU (I

5、C604). If it becomes high temperature, the APC voltage is controlled to cool down the temperature. 4. PLL circuit 4-1. Reference oscillator circuit The 12.8MHz signal is generated by the crystal oscillator circuit (IC1 and IC301) and internally divided to generate 5kHz or 6.25kHz reference frequency

6、. The 12.8MHz signal on IC1 side is tripled by Q102 to obtain the second local oscillator for the A band. The reference oscillation circuit is also modulated to improve the modulation characteristics of the DCS and 9600bps packet signal when it is transmitted. Fig. 11 PLL circuit VHF VCO HTCV Q3 2SC

7、5108 (Y) PLL LD Q102 2SC4649 (N,P) 38.4MHz 12.8MHz X3 IC1 MB1511PFV-GBND CHARGE PUMP Q1 2SA1774(S) Q2 2SC4617(R) IC2 KCH38 UHF VCO HTCV Q304 2SC5108 (Y) PLL 12.8MHz LD IC301 MB1511PFV-GBND CHARGE PUMP Q300 2SA1774(S) IC302 KCH28 Q301 2SC4617(R) TM-V708A 10 CIRCUIT DESCRIPTION 4-2. Phase comparator P

8、art of the VHF VCO output is amplified by Q3 and goes to VHF PLL IC. Also, a part of the UHF VCO output is amplified by Q302 and goes to the UHF PLL IC. The pulse-swallow type PLL IC divides the input VCO oscillator frequency using the data from the CPU (IC604). It compares its phase with that of th

9、e reference frequency to make the PLL synthesizer to generate the desired step. 4-3. Lock voltage (VCO control voltage) The phase differential comparator, output from the PLL IC, results in a phase difference pulse. This pulse is amplified by a charge pump (Q1, Q2 or Q300, Q301), the ripples are rem

10、oved by a low-pass filter Then the signal is supplied as the oscillator frequency control voltage for each VCO. 4-4. Unlock detection circuit When the PLL is unlocked, a low state voltage is outputted from pin 8 of the PLL IC. This signal is monitored by the CPU (IC604) to control transmission/recep

11、tion switching timing. 5. Power supply circuit 5-1. Microcomputers and peripheral circuits Reset and backup circuits The CPU reset signal is generated by detecting a rising edge of the M5C line voltage with the reset IC (IC601). When the voltage supplied to the transceiver decreases and the B line v

12、oltage falls below the detection voltage of the voltage detection circuit (Q604, D604), the CPU (IC604) detects it through the interrupt pin, stores data in the EEPROM (IC602), and shuts the power off. CPU IC604 DISPLAY X54-329 Fig. 12 Structure of non-synchronized serial communication 5-2. Voltage

13、detection processing The CPU (IC604) monitors and process various voltage status at IC604 A/D ports. The squelch voltage is input from the IF IC and a change in the noise voltage is detected to control squelch. The S meter voltage is input from the IF IC to control the S meter display. The thermisto

14、r voltage (temperature) and the remote control microphone key operation are also detected through the A/D port. 5-3.Serial control The CPU (IC604) controls the panel unit (X54-329 unit) through a synchronous serial communication. 6. AF Signal System 6-1. Beep circuit and mute circuit A beep sound is

15、 generated by the CPU (IC604) and goes to cross point switch (IC702). This signal is switched by the cross point switch (IC702) and are input to the electronic volume (IC804). While the beep signal is output from the microprocessor, audio signals for each band are muted by the cross point switch (IC

16、702) with the serial data from the microprocessor (IC604). The signals output from the electronic volume (IC804) are input to the speaker switching circuit and go through the audio mute circuit (Q804 and Q805). Then it is input to the power amp (IC806). Fig. 13 Beep circuit and mute circuit CROSS PO

17、INT SW AO 1 AO 0 CPU R857R874 R870 R873 R872 R875 R858 IC 808 IC807 Q804 Q805 MUTE MUTE D803 J801 J802 CN800 IC806 POWER AMP BEEP DTMF RAV RAU IC702IC804 IC604 ELECTRONIC VOLUME 138 16 1 1 7 7 5 5 6 TM-V708A 11 CIRCUIT DESCRIPTION The AF signal output combinations are as in the speaker combination t

18、able on the below. Fig. 15 Microphone key input circuit Fig. 14 Speaker switching circuit CROSS POINT SW AO 1 AO 0 CPU R857R874 R870 R873 R872 R875 R858 IC 808 IC807 Q804 Q805 MUTE MUTE D803 J801 J802 CN800 IC806 POWER AMP BEEP DTMF RAV RAU IC702IC804 IC604 ELECTRONIC VOLUME 138 16 1 1 7 7 5 5 6 MIC

19、 PTT MIC UP MIC DW INT3 MICRO PROCESSOR M 5C 5C R806 R804 R803 R805 MIC 100K 100K 22K 22K IC604 R683 R684 R685 IC800 R812 R808 C801C800C802 PTT UP DOWN CALL VFO MR PF KEY INPUT INTERRUPT CIRCUIT 6-2. Speaker Switching Circuit There are two speaker jacks, J801 and J802. The AF signals can be output i

20、n various combinations matching the internal speakers. When no external speaker is connected to J801, Pins 5 of the multiplexer (IC807, IC808) go low, the AF signals AO 0 and AO 1 are added and input to the power amp (IC806). When an external speaker is connected to J801, Pins 5 of the multiplexer (

21、IC18) go high and AO 0 and AO 1 are input separately to the power amp. 6-3. Microphone Key Input The microphone UP/DOWN and function keys are connected to the microprocessor analog input. The voltage when a key is ON operates the corresponding function. Also, the key input interrupt circuit is for s

22、witching the power ON/ OFF with the microphone. When the DOWN, MR, and PF keys are pressed, an interrupt is generated and the microprocessor is awoken from stop mode. However, with the TM-V708A, the power ON/OFF switch function can be registered to the PF key on the microphone. AO 1AO 0 Internal spe

23、akers onlyInternal speaker 1 external speaker (J802)external speaker 1 external speaker (J801)Internal speakerexternal speaker 2 external speakerexternal speakerexternal speaker Table5 Speaker combination table TM-V708A 12 CIRCUIT DESCRIPTION 7. Data Terminal and Peripheral Circuits J700 (data termi

24、nal) is the data communications terminal on the front. It handles transmission control, data input/ output, and squelch signals. There are two data communications modes: 9600bps mode and 1200bps mode. 9600bps mode communications are FAST FM mode of SSTV, GMSK and G3RUH packet communications. Unlike

25、with 1200bps AFSK, with this type of high-speed modulation, frequency modulation is carried out after the digital base band signals (rectangular wave) are passed through a band limiting filter. For 9600bps GMSK for example, compared to 4800Hz signals (nearly sine wave signals passed through a filter

26、), these signals have a hissing sound like digital modulation when listened to by ear. Fig. 16 Transmission signals Different types of modulation, such as GMSK and G3RUH, are distinguished by the type of band limiting filter. 7-1. Transmission signals Transmission modulation signals enter from PKD o

27、f the data tenninals (J700). The path to the modulation depends on whether communications are 1200bps or 9600bps mode. For 1200bps mode, the transmission modulation signals pass through the analog switch (IC803), and are input to IC801 (Pin 6). The signals pass through the pre-emphasis (Q801, Q802),

28、 are adjusted by the electronic volume, and are input to the VCO. For 9600bps mode, the transmission modulation signals pass through IC803 and amplified by the tone amp (IC802). Then it is adjusted by the electronic volume, and are input to the VCO. The frequency shift depends on the input signal le

29、vel, so there is an amplitude limiting circuit (D702, D703) to hold the signal below 4 Vp-p to avoid extreme shifts. Thanks to this circuit, the PKD signal does not go above 4 Vp-p and the frequency shift does not fluctuate extremely. PinPin Specification No. name 1PKDbps switching1200bps9600bps Mod

30、ulation input40mVp-p2Vp-p Frequency shift30.5kHz2.20.5kHz 4PR9Out level 500mVp-p/10k Always output during reception 5PR1Output level 500mVp-p/10k Not output when squelch off Table6 DATA terminal input/output level Q802 2SC4617 (S) PRE-EMPHASIS Q801 2SC4617 (S) ELECTRONIC VOLUME Q701 2SC4617 (R) Q700

31、 2SC4617 (R) BUFFER BUFFER MICRO COMPUTER ANALOG SW IC803 AMP IC801 IC802 TA75SOIF RA RD VCO VCO PKD SQC PR1 PR9 PKS IC804 IC703 BUFFER MICRO COMPUTER TM-V708A 13 CIRCUIT DESCRIPTION Dimmer levelDIM 0DIM 1DIM 2DIM 3 1HLLL 2LHLL 3LLHL 4LLLH OFFLLLL 7-2. Reception signals PR9 is the 9600bps data commu

32、nications reception output. It outputs the FM detection circuit output (RD signals) through a buffer amp (Q700). These signals are always output whether the squelch is open or closed. PR1 is the 1200bps data communications reception output. It outputs the FM detection circuit output (RA signals) thr

33、ough a buffer amp (Q701). Output is controlled with the cross point switch (IC702) according to whether squelch is open or closed. 7-3. Squelch signal output circuit The squelch circuits is input to the TNC to prevents conflicts from occurring between simultaneous receive mode and transmit mode traf

34、fic during packet communications. (only during 1200bps) The signal is output from Pin 15 of IC703 to the data terminal. The logic is as shown in the Table below. 8. Panel Section (LCD ASSY: B38-0829-05) The panel section controls serial communications with the main unit control section, the key inpu

35、t circuit, the display circuit, and the dimmer circuit through the microprocessor (IC4). 8-1. Serial communications circuit A buffer amp is inserted in order to protect the microprocessor ports. 8-2. Key, Volume Input circuit Circuits to operate the panel section keys are connected to each microproc

36、essor port. The PSW key is pulled up and the other keys are pulled up with software within the microprocessor. Rotary encoder operating circuits are connected directly to the microprocessor. The control divides the power supply voltage, reads the A/D port of the microprocessor, and transfers that da

37、ta to the main unit. SQC terminal outputL: SQ CLOSE (J700 Pin 6)H: SQ BUSY 8-3. Display circuit The TM- V708A display section is a 188x54-dot full-dot matrix LCD controlled by two LCD. As shown is Figure 17, the master IC (IC2) side is connected to 22 common dots and 88 segment dots and the stave IC

38、 (IC1) side is connected to 33 common dots and 100 segment dots. The LCD drive voltage is obtained by raising the power supply voltage (5V) within the IC. 8-4. Dimmer circuit The dimmer circuit switches the lamp brightness to one of four levels or OFF. (See table7) The current flowing to the LEDs is

39、 varied by selecting resistors from R8 to R14. LCD 188 54 (dot) Microprocessor IC4 33 COM 22 COM 88 SEG 100 SEG LCD Driver IC2 LCD Driver IC1 X54-329 Fig. 17 Display circuit Table7 Port logic 9V D30R42 D24D25R39 D26D27R40 D28D29R41 IC4 Microprocessor DIM3Q8 DIM2Q7 DIM1 DIM0 Q6 Q5 Q3 R8 R10 R9 R12 R1

40、1 R14 R13LCD ASSY Q2 Q4 Fig. 18 Dimmer circuit TM-V708A 14 SEMICONDUCTOR DATA 30622M8759GP (PANEL UNIT CPU : IC4) Pin Port NameI/OFunction Active No.Level 1KYCALLICALL key inputL 2KYVFOIVFO key inputL 3KYMRIMR key inputL 4KYPMIPM key inputL 5KYMNUIMENU key inputL 6BYTEISelect 8-bit data bus (5C) 7CN

41、VSSISelect memory expansion mode (GND) 8FUNCIF1 key inputL 9KYF1IF2 key inputL 10RESETIReset 11XOUTOClock output 12VSS-GND 13XINIClock input 14VCC-Power supply input 15NMI(I)Not used 16INT2IInterrupt from serial input port 17INT1IEncoder pulse 1 input 18INT0IEncoder pulse 2 input 19KYF2IF3 key input

42、L 20KYF3IF4 key inputL 21NCINot used (VCC) 22NCINot used (VCC) 23-26DIM3-0ODimmer output 27PSWOPower SW control output 28BSOBeat shift output 29NCINot used (VCC) 30NCINot used (VCC) 31KYF4IF5 key inputL 32KYF5IF6 key inputL 33TXD0OSerial port for connecting to TX-RX unit 34RXD0ISerial port for conne

43、cting to TX-RX unit 35NCINot used (VCC) 36NCINot used (VCC) 37-41NCINot used 42RD-Read signal 43NC-Not used 44WR-Write signal 45LCDA0OLCD Address 0 46LCDCD2OLCD chip select 2 47LCDCD1OLCD chip select 1 48CS0-Flash ROM chip select signal 49A19-Not used (Open) 50-59A18-9-Address bus 18-9 60VCC-Power s

44、upply input 61A8-Address bus 8 62VSS-GND 63-70A7-0-Address bus 7-0 71-78LCDD7-0I/OLCD data bus 7-0 79-86D7-0-Data bus 7-0 87LCDRDOLCD read terminal 88LCDWROLCD write terminal 89LCDRESOLCD reset 90PWRIPOWER key input (key interrupt)L 91B-AFVRIB band R AF VOL (A/D) 92B-SQVRIB band R SQ VOL (A/D) 93A-A

45、FVRIA band L AF VOL (A/D) 94AVSS-Analog power input (GND) 95A-SQVRIA band L SQ VOL (A/D) 96VREF-A/D reference voltage input 97AVCC-Analog power supply input (5C) 98MHzIMHz key inputL 99B_KEYIB BAND SEL key inputL 100A_KEYIA BAND SELl key inputL Pin Port NameI/OFunction Active No.Level TM-V708A 15 SE

46、MICONDUCTOR DATA 78F4218AGJZXA (TX-RX UNIT CPU : IC604) Pin No.Port NameI/OFunctionActive Level 1UPLLENOU PLL Enable outputMB1511PFV 2VPLLENOV PLL Enable outputMB1511PFV 3PSW1OTransceiver main power switch (SBSW)H:ON 4PSW2OTransceiver main power switch (CPU)L:ON 5MIC MUTE1OMIC MUTE 1 (MIC input)H:Mu

47、teH 6MIC MUTE2OMIC MUTE 2 (SPF out)H:MuteH 7RST SWIHard reset switchNormal:L 8SHIFTOClock shiftNormal:L 9VDD-Positive power supply 10X2OSystem clock11.0592MHz 11X1ISystem clock 12VSS-GND 13XT2-OPEN 14XT1-Connect to VSS 15RESETISystem resetH:ResetH 16BACKUPIPower voltage fall detection interruptH:Back up modeH 17NOT USEDINot used 18NCONot used 19NOT USEDINot used 20SISIUART control signal input from STN panelH 21MUTE5ODTMF/1750Hz mute outputH:Mute 22MIC PWRIRemote control keys DOWN, MR, PF, power switchL 23AVDD-Connect to VDD 2